Methods for depositing oxide thin films, such as metal oxide, metal silicates, silicon oxycarbide (SiOC) and silicon oxycarbonitride (SiOCN) thin films, on a substrate in a reaction space are provided. The methods can include at least one plasma enhanced atomic layer deposition (PEALD) cycle including alternately and sequentially contacting the substrate with a first reactant that comprises oxygen and a component of the oxide, and a second reactant comprising reactive species that does not include oxygen species. In some embodiments the plasma power used to generate the reactive species can be selected from a range to achieve a desired step coverage or wet etch rate ratio (WERR) for films deposited on three dimensional features. In some embodiments oxide thin films are selectively deposited on a first surface of a substrate relative to a second surface, such as on a dielectric surface relative to a metal or metallic surface.

A device includes a semiconductor fin, a gate structure, gate spacers, and a dielectric feature. The semiconductor fin is over a substrate. The gate structure is over the semiconductor fin and includes a gate dielectric layer over the semiconductor fin and a gate metal covering the gate dielectric layer. The gate spacers are on opposite sides of the gate structure. The dielectric feature is over the substrate. The dielectric feature is in contact with the gate metal, the gate dielectric layer, and the gate spacers, and an interface between the gate metal and the dielectric feature is substantially aligned with an interface between the dielectric feature and one of the gate spacers.

The present disclosure relates to methods for forming a high-k gate dielectric, the methods comprising the steps of providing a semiconductor substrate, cleaning the substrate, performing a thermal treatment, and performing a high-k dielectric material deposition, wherein said thermal treatment step is performed in a non-oxidizing ambient, leading to the formation of a thin interfacial layer between said semiconductor substrate and said high-k dielectric material and wherein the thickness of said thin interfacial layer is less than 10 Å.

Disclosed is a compound semiconductor material with excellent performance and its utilization. The compound semiconductor may be expressed by Chemical Formula 1 below:

M1.sub.aCo.sub.4Sb.sub.12-xM2.sub.x   Chemical Formula 1

where M1 and M2 are respectively at least one selected from In and a rare earth metal element, 0≦a≦1.8, and 0≦x≦0.6.

Amorphous silicon doped yttrium oxide films and methods of making same are described. Deposition of the amorphous silicon doped yttrium oxide film by thermal chemical vapor deposition or atomic layer deposition process are described.

A method of forming a semiconductor device includes forming a gate structure over first and second fins over a substrate; forming an interlayer dielectric layer surrounding first and second fins; etching a first trench in the interlayer dielectric layer between the first and second fins uncovered by the gate structure; forming a helmet layer lining the first trench; and forming a dielectric feature in the first trench.

Embodiments of the present application provide a semiconductor structure and its formation method. The method includes: the substrate being provided with a groove, a sidewall of the groove including a first sub-sidewall and a second sub-sidewall that extend upwards from a bottom of the groove sub-sidewall; blowing a first precursor to a surface of the substrate, so that the first precursor is attached to a top surface of the substrate and the second sub-sidewall; blowing a second precursor to the surface of the substrate, so that the second precursor reacts with the first precursor to form a dielectric layer; alternately blowing the first precursor and the second precursor to the surface of the substrate to form a plurality of dielectric layers until a top opening of the groove is blocked, a region enclosed by the first sub-sidewall, the dielectric layer and the bottom of the groove forming a void.

Disclosed is a compound semiconductor material with excellent performance and its utilization. The compound semiconductor may be expressed by Chemical Formula 1 below:
M1.sub.aCo.sub.4Sb.sub.12-xM2.sub.x  Chemical Formula 1 where M1 and M2 are respectively at least one selected from In and a rare earth metal element, 0≤a≤1.8, and 0≤x≤0.6.

Apparatuses, methods, and systems related to electrode formation are described. A first portion of a top electrode is formed over a dielectric material of a storage node. A metal oxide is formed over the first portion of the electrode. A second portion of the electrode is formed over the metal oxide.

A method of forming a semiconductor device includes removing a top portion of a dielectric layer surrounding a metal gate to form a recess in the dielectric layer; filling the recess with a capping structure; forming a patterned hard mask over the capping structure and over the metal gate, wherein a portion of the metal gate, a portion of the capping structure, and a portion of the dielectric layer are aligned vertically with an opening of the patterned hard mask; and performing an etch process on said portions of the metal gate, the capping structure, and the dielectric layer that are aligned vertically with the opening of the patterned hard mask, wherein the capping structure has an etch resistance higher than an etch resistance of the dielectric layer during the etch process.