The disclosure is directed towards semiconductor devices and methods of manufacturing the semiconductor devices. The methods include forming fins in a device region and forming other fins in a multilayer stack of semiconductor materials in a multi-channel device region. A topmost nanostructure may be exposed in the multi-channel device region by removing a sacrificial layer from the top of the multilayer stack. Once removed, a stack of nanostructures are formed from the multilayer stack. A native oxide layer is formed to a first thickness over the topmost nanostructure and to a second thickness over the remaining nanostructures of the stack, the first thickness being greater than the second thickness. A gate dielectric is formed over the fins in the device region. A gate electrode is formed over the gate dielectric in the device region and surrounding the native oxide layer in the multi-channel device region.

A method for producing a semiconductor substrate is provided, including: producing a superficial layer arranged on a buried dielectric layer and including a strained semiconductor region; producing an etching mask on the superficial layer, covering a part of the region; etching the superficial layer to a pattern of the mask, exposing a first lateral edge of a first strained semiconductor portion belonging to the part and contacting the dielectric layer; forming a mechanical barrier from a second portion of material belonging to the first portion, the second portion having a bottom surface contacting the dielectric layer and an upper surface contacting the mask, the barrier arranged against the part and bearing mechanically against the second portion, and removing the mask.

A vertical memory device includes a channel extending in a vertical direction on a substrate, a charge storage structure on an outer sidewall of the channel and including a tunnel insulation pattern, a charge trapping pattern, and a first blocking pattern sequentially stacked in a horizontal direction, and gate electrodes spaced apart from each other in the vertical direction, each of which surrounds the charge storage structure. The charge storage structure includes charge trapping patterns, each of which faces one of the gate electrodes in the horizontal direction. A length in the vertical direction of an inner sidewall of each of the charge trapping patterns facing the tunnel insulation pattern is less than a length in the vertical direction of an outer sidewall thereof facing the first blocking pattern.

A method of forming an oxide layer in an in-situ steam generation (ISSG) process, including providing a silicon substrate in a rapid thermal process (RTP) chamber and injecting a gas mixture into the RTP chamber. The method further includes heating a surface of the silicon substrate to a reaction temperature, so that the gas mixture reacts close to the surface to form steam and thereby oxidize the silicon substrate to form the oxide layer on the surface, and wherein the gas mixture comprises hydrogen (H.sub.2), oxygen (O.sub.2) and nitrous oxide (N.sub.2O).

A structure includes a semiconductor substrate, a conductor-insulator-conductor capacitor. The conductor-insulator-conductor capacitor is disposed on the semiconductor substrate and includes a first conductor, a nitrogenous dielectric layer and a second conductor. The nitrogenous dielectric layer is disposed on the first conductor and the second conductor is disposed on the nitrogenous dielectric layer.

The present disclosure provides methods for treating film layers in a substrate including positioning the substrate in a processing volume of a processing chamber. The substrate can have high aspect ratio features extending a depth from a substrate surface to a bottom surface. The feature can have a width defined by a first sidewall and a second sidewall. A film with a composition that includes metal is formed on the substrate surface and the first sidewall, the second sidewall, and the bottom surface of each feature. The film in the feature can have a seam extending substantially parallel to the first and second sidewalls. The film is annealed and exposed to an oxygen radical while converting the metal of the film to a metal oxide. The metal oxide is exposed to a hydrogen radical while converting the metal oxide to a metal fill layer.

A structure includes a semiconductor substrate, a conductor-insulator-conductor capacitor. The conductor-insulator-conductor capacitor is disposed on the semiconductor substrate and includes a first conductor, a nitrogenous dielectric layer and a second conductor. The nitrogenous dielectric layer is disposed on the first conductor and the second conductor is disposed on the nitrogenous dielectric layer.

The present disclosure provides methods for treating film layers in a substrate including positioning the substrate in a processing volume of a processing chamber. The substrate can have high aspect ratio features extending a depth from a substrate surface to a bottom surface. The feature can have a width defined by a first sidewall and a second sidewall. A film with a composition that includes metal is formed on the substrate surface and the first sidewall, the second sidewall, and the bottom surface of each feature. The film in the feature can have a seam extending substantially parallel to the first and second sidewalls. The film is annealed and exposed to an oxygen radical while converting the metal of the film to a metal oxide. The metal oxide is exposed to a hydrogen radical while converting the metal oxide to a metal fill layer.

A method for forming a silicon oxide film on a step formed on a substrate includes: (a) designing a topology of a final silicon oxide film by preselecting a target portion of an initial silicon nitride film to be selectively deposited or removed or reformed with reference to a non-target portion of the initial silicon nitride film resulting in the final silicon oxide film; and (b) forming the initial silicon nitride film and the final silicon oxide film on the surfaces of the step according to the topology designed in process (a), wherein the initial silicon nitride film is deposited by ALD using a silicon-containing precursor containing halogen, and the initial silicon nitride film is converted to the final silicon oxide film by oxidizing the initial silicon nitride film without further depositing a film wherein a Si—N bond in the initial silicon nitride film is converted to a Si—O bond.

To provide a semiconductor device having improved reliability. The semiconductor device has, on a SOI substrate thereof having a semiconductor substrate, an insulating layer, and a semiconductor layer, a gate insulating film having an insulating film and a high dielectric constant film. The high dielectric constant film has a higher dielectric constant than a silicon oxide film and includes a first metal and a second metal. In the high dielectric constant film, the ratio of the number of atoms of the first metal to the total number of atoms of the first metal and the second metal is equal to or more than 75%, and less than 100%.