A method for manufacturing a semiconductor device comprising: providing a substrate, wherein an amorphous silicon layer is formed on the substrate; forming an etching auxiliary layer on the amorphous silicon layer, wherein the upper surface of the etching auxiliary layer is flat, and the etching auxiliary layer is made of a single material; and etching the amorphous silicon layer and the etching auxiliary layer to obtain an amorphous silicon layer with a target thickness, wherein the upper surface of the etched amorphous silicon layer is flat.

A method of selectively and conformally doping semiconductor materials is disclosed. Some embodiments utilize a conformal dopant film deposited selectively on semiconductor materials by thermal decomposition. Some embodiments relate to doping non-line of sight surfaces. Some embodiments relate to methods for forming a highly doped crystalline semiconductor layer.

A method of producing a film of carbon nitride material, including the steps of providing a precursor of the carbon nitride material in a reacting vessel and a substrate substantially above the precursor of the carbon nitride material; heating the reacting vessel, the precursor of the carbon nitride material and the substrate at the first predetermined temperature; and quenching the reacting vessel to reach the second predetermined temperature; wherein the film of carbon nitride material is formed on a surface of the substrate during the quenching of the reacting vessel.

The present disclosure relates to methods for forming a high-k gate dielectric, the methods comprising the steps of providing a semiconductor substrate, cleaning the substrate, performing a thermal treatment, and performing a high-k dielectric material deposition, wherein said thermal treatment step is performed in a non-oxidizing ambient, leading to the formation of a thin interfacial layer between said semiconductor substrate and said high-k dielectric material and wherein the thickness of said thin interfacial layer is less than 10 Å.

A method of manufacturing a high electron mobility transistor in a furnace, the method including steps of: forming a first SiN film on a surface of a semiconductor stack consisting of a nitride semiconductor and including a barrier layer by a low pressure chemical vapor deposition method at a first furnace temperature of 700° C. or more and 900° C. or less; forming an interface oxide layer on the first SiN film by moisture and oxygen in the furnace at a second furnace temperature of 700° C. or more and 900° C. or less and a furnace pressure to 1 Pa or lower; and forming a second SiN film on the interface oxide layer by the low pressure chemical vapor deposition method at a third furnace temperature of 700° C. or more and 900° C. or less.

A thin film circuit includes a thin film transistor with a metal oxide semiconductor channel having a conduction band minimum (CBM) with a first energy level. The transistor further includes a layer of passivation material covering at least a portion of the metal oxide semiconductor channel. The passivation material has a conduction band minimum (CBM) with a second energy level. The second energy level being lower than, equal to, or no more than 0.5 eV above the first energy level. The circuit is used for an electronic device including any one of an AMLCD, AMOLED, AMLED, AMEPD.

A method for manufacturing a semiconductor device comprising: providing a substrate, wherein an amorphous silicon layer is formed on the substrate; forming an etching auxiliary layer on the amorphous silicon layer, wherein the upper surface of the etching auxiliary layer is flat, and the etching auxiliary layer is made of a single material; and etching the amorphous silicon layer and the etching auxiliary layer to obtain an amorphous silicon layer with a target thickness, wherein the upper surface of the etched amorphous silicon layer is flat.

A display panel, an evaporation method of a luminous material, and an equipment are provided. The method is performed by providing an electric field covering an array substrate, and generating luminous material charged particles. After the luminous material charged particles passing through the mask, they will change a direction of motion under an action of the electric field, and move perpendicularly to a pixel area of the array substrate along a direction of the electric field, and then uniformly deposit on the pixel area of the array substrate, which ensures that a uniformity of film formation of the luminous material.

A method includes etching a dielectric layer of a substrate to form an opening in the dielectric layer, forming a metal layer extending into the opening, performing an anneal process, so that a bottom portion of the metal layer reacts with a semiconductor region underlying the metal layer to form a source/drain region, performing a plasma treatment process on the substrate using a process gas including hydrogen gas and a nitrogen-containing gas to form a silicon-and-nitrogen-containing layer, and depositing a metallic material on the silicon-and-nitrogen-containing layer.

There is provided a technique that includes: (a) supplying an adsorption suppressor to a substrate having a surface on which a first base and a second base are exposed under a first temperature to adsorb the adsorption suppressor on a surface of one base of the first base and the second base; (b) thermally annealing the substrate under a second temperature higher than the first temperature after adsorbing the adsorption suppressor on the surface of the one base; and (c) forming a film on a surface of the other base different from the one base of the first base and the second base by supplying a film-forming gas to the thermally-annealed substrate under a third temperature lower than the second temperature.