H01L21/02282

Polybenzoxazole Precursor and Application Thereof

The present invention provides a polybenzoxazole precursor, which comprises a structure of formula (I):

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wherein the definitions of Y, Z, R.sub.1, i, j, and V are provided herein. By means of the polybenzoxazole precursor, the resin composition of the present invention is able to form a film with high frequency characteristics and high contrast.

Coating film forming method
11557495 · 2023-01-17 · ·

A coating film forming method includes: rotating a substrate at a first rotation speed in a coating cup with an upper surface open, and supplying and diffusing a coating solution for forming a coating film on the substrate; and after the supplying and diffusing the coating solution, drying the substrate by exhausting air through a gap between an annular member arranged above the substrate with centers thereof being located on a same axis and the front surface of the substrate, while rotating the substrate at a second rotation speed lower than the first rotation speed, wherein at the drying the substrate, a flow velocity of the air exhausted through the gap is higher than a flow velocity of air supplied from above the substrate in the coating cup to the substrate.

COMPOSITION AND METHOD FOR FORMING A DIELECTRIC LAYER

A porous layer is described. The porous layer comprises a solidified sol-gel inorganic material having a distribution of nanometric voids, wherein at least some of nanometric voids are at least partially coated internally by carbon or a hydrophobic substance containing carbon.

Lithography Using High Selectivity Spacers for Pitch Reduction

A method embodiment for patterning a semiconductor device includes patterning a dummy layer over a hard mask to form one or more dummy lines. A sidewall aligned spacer is conformably formed over the one or more dummy lines and the hard mask. A first reverse material layer is formed over the sidewall aligned spacer. A first photoresist is formed and patterned over the first reverse material layer. The first reverse material layer using the first photoresist as a mask, wherein the sidewall aligned spacer is not etched. The one or more dummy lines are removed, and the hard mask is patterned using the sidewall aligned spacer and the first reverse material layer as a mask. A material used for forming the sidewall aligned spacer has a higher selectivity than a material used for forming the first reverse material layer.

Acoustic measurement of fabrication equipment clearance

Methods and systems disclosed herein use acoustic energy to determine a gap between a wafer and an integrated circuit (IC) processing system and/or determine a thickness of a material layer of the wafer during IC processing implemented by the IC processing system. An exemplary method includes emitting acoustic energy through a substrate and a material layer disposed thereover. The substrate is positioned within an IC processing system. The method further includes receiving reflected acoustic energy from a surface of the substrate and a surface of the material layer disposed thereover and converting the reflected acoustic energy into electrical signals. The electrical signals indicate a thickness of the material layer.

INTERCONNECT STRUCTURES FOR ASSEMBLY OF SEMICONDUCTOR STRUCTURES INCLUDING SUPERCONDUCTING INTEGRATED CIRCUITS

A multi-layer semiconductor structure includes a first semiconductor structure and a second semiconductor structure, with at least one of the first and second semiconductor structures provided as a superconducting semiconductor structure. The multi-layer semiconductor structure also includes one or more interconnect structures. Each of the interconnect structures is disposed between the first and second semiconductor structures and coupled to respective ones of interconnect pads provided on the first and second semiconductor structures. Additionally, each of the interconnect structures includes a plurality of interconnect sections. At least one of the interconnect sections includes at least one superconducting and/or a partially superconducting material.

SUBSTRATE TREATMENT METHOD AND SUBSTRATE TREATMENT SYSTEM
20230024937 · 2023-01-26 ·

A substrate treatment method for treating a substrate, includes the steps of: (A) heating the substrate having a coating film formed on a surface thereof by supply of a coating solution; (B), after the (A) step, moving a discharge destination of a removing solution from a peripheral position on the surface of the substrate toward a center side of the substrate and turning it back at a first position to return it again to the peripheral position while rotating the substrate; (C), after the (B) step, moving the discharge destination of the removing solution from the peripheral position on the surface of the substrate toward center side of the substrate and turning it back at a second position closer to an outside than the first position to return it again to the peripheral position while rotating the substrate; and (D), after the (C) step, heating again the substrate.

Priming material for substrate coating

A coating technique and a priming material are provided. In an exemplary embodiment, the coating technique includes receiving a substrate and identifying a material of the substrate upon which a layer is to be formed. A priming material is dispensed on the material of the substrate, and a film-forming material is applied to the priming material. The priming material includes a molecule containing a first group based on an attribute of the substrate material and a second group based on an attribute of the film-forming material. Suitable attributes of the substrate material and the film-forming material include water affinity and degree of polarity and the first and second groups may be selected to have a water affinity or degree of polarity that corresponds to that of the substrate material and the film-forming material, respectively.

TRANSISTOR BOUNDARY PROTECTION USING REVERSIBLE CROSSLINKING REFLOW

Methods are presented for forming multi-threshold field effect transistors. The methods generally include depositing and patterning an organic planarizing layer to protect underlying structures formed in a selected one of the nFET region and the pFET region of a semiconductor wafer. In the other one of the nFET region and the pFET region, structures are processed to form an undercut in the organic planarizing layer. The organic planarizing layer is subjected to a reflow process to fill the undercut. The methods are effective to protect a boundary between the nFET region and the pFET region.

Method for transferring thin layers

A method for transferring a thin layer onto a destination substrate having a face with an adhesive layer includes formation of a polymer material interface layer on a second face of a thin layer, opposite a first face on which an adhesive is present. The method also includes assembly by gluing the interface layer and the adhesive layer and separation of the thin layer relative to a temporary support.