Embodiments described herein provide for post deposition anneal of a substrate, having an amorphous carbon layer deposited thereon, to desirably reduce variations in local stresses thereacross. In one embodiment, a method of processing a substrate includes positioning a substrate, having an amorphous carbon layer deposited thereon, in a first processing volume, flowing an anneal gas into the first processing volume, heating the substrate to an anneal temperature of not more than about 450° C., and maintaining the substrate at the anneal temperature for about 30 seconds or more. Herein, the amorphous carbon layer was deposited on the substrate using a method which included positioning the substrate on a substrate support disposed in a second processing volume, flowing a processing gas into the second processing volume, applying pulsed DC power to a carbon target disposed in the second processing volume, forming a plasma of the processing gas, and depositing the amorphous carbon layer on the substrate.

A method of forming a semiconductor device includes: forming a dummy gate structure over a fin structure that protrudes above a substrate, where the fin structure includes a fin and a layer stack over the fin, where the layer stack comprises alternating layers of a first semiconductor material and a second semiconductor material; forming openings in the fin structure on opposing sides of the dummy gate structure, where the openings exposes first portions of the first semiconductor material and second portions of the second semiconductor material; recessing the exposed first portions of the first semiconductor material to form sidewall recesses in the first semiconductor material; lining the sidewall recesses with a first dielectric material; depositing a second dielectric material in the sidewall recesses on the first dielectric material; after depositing the second dielectric material, annealing the second dielectric material; and after the annealing, forming source/drain regions in the openings.

There is provided resist underlayer film for lithography process with high dry etching resistance, wiggling resistance, and heat resistance. Resist underlayer film-forming composition for lithography including polymer having unit structure of Formula (1): wherein A is hydroxy group-substituted C.sub.6-40 arylene group derived from polyhydroxy aromatic compound; B is C.sub.6-40 arylene group or C.sub.4-30 heterocyclic group containing nitrogen atom, oxygen atom, sulfur atom, or combination thereof; X.sup.+ is H.sup.+, NH.sub.4.sup.+, primary ammonium ion, secondary ammonium ion, tertiary ammonium ion, or quaternary ammonium ion, T is hydrogen atom, C.sub.1-10 alkyl group or C.sub.6-40 aryl group that may be substituted with halogen group, hydroxy group, nitro group, amino group, carboxylate ester group, nitrile group, or combination thereof as substituent, or C.sub.4-30 heterocyclic group containing nitrogen atom, oxygen atom, sulfur atom, or combination thereof, B and T may form C.sub.4-40 ring together with carbon atom to which they are bonded. ##STR00001##

A method for electrically characterizing a layer disposed on a substrate and electrically insulated from the substrate is disclosed. The method can include forming a test pattern, contacting the test pattern with electrical contact elements at contact regions, and measuring an electrical parameter of the layer by passing a first set of test currents between contact regions. The test pattern can be formed by pushing a pattern forming head against a top surface of the layer, introducing a first fluid into the cavity, and converting the sacrificial portion of the layer into an insulator using the first fluid and forming the test pattern under the test-pattern-shaped inner seal.

A self-assembled nanostructure comprises first domains and second domains. The first domains comprise a first block of a block copolymer material and an activatable catalyst. The second domains comprise a second block and substantially without the activatable catalyst. The activatable catalyst is capable of generating catalyst upon application of activation energy, and the generated catalyst is capable of reacting with a metal oxide precursor to provide a metal oxide. A semiconductor structure comprises such self-assembled nanostructure on a substrate.

Methods and apparatuses for depositing material into high aspect ratio features are described herein. Methods involve depositing an oxide material using a hydrogen-containing oxidizing chemistry. Methods may also involve thermally treating deposited oxide material in the presence of hydrogen to remove seams within the deposited oxide material.

In an embodiment, a method includes: forming a gate dielectric layer on an interface layer; forming a doping layer on the gate dielectric layer, the doping layer including a dipole-inducing element; annealing the doping layer to drive the dipole-inducing element through the gate dielectric layer to a first side of the gate dielectric layer adjacent the interface layer; removing the doping layer; forming a sacrificial layer on the gate dielectric layer, a material of the sacrificial layer reacting with residual dipole-inducing elements at a second side of the gate dielectric layer adjacent the sacrificial layer; removing the sacrificial layer; forming a capping layer on the gate dielectric layer; and forming a gate electrode layer on the capping layer.

Curing of a passivation layer applied to the surface of a ferroelectric integrated circuit so as to enhance the polarization characteristics of the ferroelectric structures. A passivation layer, such as a polyimide, is applied to the surface of the ferroelectric integrated circuit after fabrication of the active devices. The passivation layer is cured by exposure to a high temperature, below the Curie temperature of the ferroelectric material, for a short duration such as on the order of ten minutes. Variable frequency microwave energy may be used to effect such curing. The cured passivation layer attains a tensile stress state, and as a result imparts a compressive stress upon the underlying ferroelectric material. Polarization may be further enhanced by polarizing the ferroelectric material prior to the cure process.

Methods and precursors for depositing metal fluoride films on a substrate surface are described. The method includes exposing the substrate surface to a metal precursor and a fluoride precursor. The fluoride precursor is volatile at a temperature in a range of from 20° C. to 200° C. The metal precursor reacts with the fluoride precursor to form a non-volatile metal fluoride film.

Disclosed are methods and systems for filling a gap. An exemplary method comprises providing a substrate to a reaction chamber. The substrate comprises the gap. The method comprises filling the gap with a metal-containing material.