Patent classifications
H01L21/16
Adhesive for semiconductor, fluxing agent, manufacturing method for semiconductor device, and semiconductor device
An adhesive for a semiconductor, comprising an epoxy resin, a curing agent, and a compound having a group represented by the following formula (1): ##STR00001##
wherein R.sup.1 represents an electron-donating group.
Semiconductor device comprising oxide semiconductor layer including regions with different concentrations of resistance-reducing elements
To increase the on-state current of a transistor whose channel is formed in an oxide semiconductor layer. To provide a transistor where a resistance-reducing element is introduced into a region of an oxide semiconductor layer which overlaps with part of a source or drain or part of a gate. For example, the thickness of a region of a conductive layer serving as a source or drain or a gate (at least part of a region overlapping with an oxide semiconductor layer) is made smaller than that of the other region of the conductive layer. A resistance-reducing element is introduced into the oxide semiconductor layer through the conductive layer thinned partly, thereby obtaining the oxide semiconductor layer where the resistance-reducing element is introduced into the region overlapping with part of the source or drain or part of the gate. Thus, the on-state current of the transistor can be increased.
Semiconductor device and manufacturing method thereof
A semiconductor device capable of high speed operation is provided. Further, a semiconductor device in which change in electric characteristics due to a short channel effect is hardly caused is provided. An oxide semiconductor having crystallinity is used for a semiconductor layer of a transistor. A channel formation region, a source region, and a drain region are formed in the semiconductor layer. The source region and the drain region are formed by self-aligned process in which one or more elements selected from Group 15 elements are added to the semiconductor layer with the use of a gate electrode as a mask. The source region and the drain region can have a wurtzite crystal structure.
Thin film transistor and method of manufacturing the same, array substrate and display device
The present invention discloses a thin film transistor, comprising a gate electrode (2), a gate insulating layer (3), and active layer (4), and etching barrier layer (7), a source electrode and a drain electrode, wherein the source electrode comprises a first source electrode (5) and a second source electrode (8) electrically connected therewith, the drain electrode comprises a first drain electrode (6) and a second drain electrode (9) electrically connected therewith, the first source electrode and first drain electrode are formed on the active layer, the etching barrier layer at least covers a portion of the active layer between the first source electrode and the first drain electrode, and respectively covers portions of the first source electrode (5) and the first drain electrode (6) adjacent to each other, and the second source electrode and the second drain electrode are formed on the etching barrier layer. The present invention further discloses a method of manufacturing a thin film transistor, an array substrate and a display device both comprising the thin film transistor. The thin film transistor formed according to the present invention has a short channel length, which increases an on-state current of the thin film transistor while improving ohmic contact between the source and drain electrodes and the active layer, thereby increasing the stability of the thin film transistor.
Semiconductor device and method for manufacturing the same
An object is, in a thin film transistor in which an oxide semiconductor is used as an active layer, to prevent change in composition, film quality, an interface, or the like of an oxide semiconductor region serving as an active layer, and to stabilize electrical characteristics of the thin film transistor. In a thin film transistor in which a first oxide semiconductor region is used as an active layer, a second oxide semiconductor region having lower electrical conductivity than the first oxide semiconductor region is formed between the first oxide semiconductor region and a protective insulating layer for the thin film transistor, whereby the second oxide semiconductor region serves as a protective layer for the first oxide semiconductor region; thus, change in composition or deterioration in film quality of the first oxide semiconductor region can be prevented, and electrical characteristics of the thin film transistor can be stabilized.
Semiconductor structure in which film including germanium oxide is provided on germanium layer, and method for manufacturing semiconductor structure
A semiconductor structure includes: a germanium layer; and a first insulating film that is formed on an upper surface of the germanium layer, primarily contains germanium oxide and a substance having an oxygen potential lower than an oxygen potential of germanium oxide, and has a physical film thickness of 3 nm or less; wherein a half width of frequency to height in a 1 μm square area of the upper surface of the germanium layer is 0.7 nm or less.
Thin film transistor and manufacturing method thereof, display substrate and display device
A thin film transistor and a manufacturing method thereof, a display substrate and a display device are provided. The method of manufacturing the thin film transistor comprises forming an active layer (4) having characteristics of crystal orientation of C-axis on a substrate (1) by using indium gallium zinc oxide (InGaO.sub.3(ZnO).sub.m), where m≧2. The active layer fabricated with InGaO.sub.3(ZnO).sub.m has a good electron mobility, and the quality of the fabricated active layer is improved.
TFT backplate structure comprising transistors having gate isolation layers of different thicknesses and manufacture method thereof
The present invention provides a TFT backplate structure and a manufacture method thereof. The TFT backplate structure comprises a switch TFT (T1) and a drive TFT (T2). The switch TFT (T1) is constructed by a first source/a first drain (61), a first gate (21), and a first etching stopper layer (51), a first oxide semiconductor layer (41), a first gate isolation layer (31) sandwiched in between. The drive TFT (T2) is constructed by a second source/a second drain (62), a second gate (22), and a second oxide semiconductor layer (42), a first etching stopper layer (51), a second gate isolation layer (32) sandwiched in between. The electrical properties of the switch TFT (T1) and the drive TFT (T2) are different. The switch TFT has smaller subthreshold swing to achieve fast charge and discharge, and the drive TFT has relatively larger subthreshold swing for controlling the current and the grey scale more precisely.
Field-effect transistor with a total control of the electrical conductivity on its channel
The first object of the invention is directed to field-effect gate transistor comprising (a) a substrate, (b) a source terminal, (c) a drain terminal, and (d) a channel between the source terminal and the drain terminal, the channel being a layer of Cu.sub.xCr.sub.yO.sub.2 in which the y/x ratio is superior to 1. The field-effect gate transistor is remarkable in that the channel of Cu.sub.xCr.sub.yO.sub.2 presents a gradient of holes concentration. The second object of the invention is directed to a method for laser annealing a field-effect gate transistor in accordance with the first object of the invention.
Method of growing semiconductor layers, method of manufacturing semiconductor device, and method of growing balk crystal
A method of growing semiconductor layers may include: growing a first semiconductor layer on a surface of a substrate at which a crystal layer is exposed, wherein the first semiconductor layer is different from the crystal layer in at least one of a material and a crystal structure; cutting the first semiconductor layer such that a cut surface of the first semiconductor layer extends from a front surface of the first semiconductor layer to a rear surface of the first semiconductor layer; and growing a second semiconductor layer on the cut surface of the first semiconductor layer, wherein the second semiconductor layer has a material and a crystal structure that are same as those of the first semiconductor layer.