Patent classifications
H01L21/34
SELF-FORMING SPACERS USING OXIDATION
A method of forming a self-forming spacer using oxidation. The self-forming spacer may include forming a fin field effect transistor on a substrate, the fin field effect transistor includes a gate on a fin, the gate is perpendicular to the fin; forming a gate spacer on the gate and a fin spacer on the fin, the gate spacer and the fin spacer are formed in a single step by oxidizing an exposed surface of the gate and an exposed surface of the fin; and removing the fin spacer from the fin.
Backlight structure
A backlight structure is provided. The backlight structure includes a substrate, a light emitting diode array layer disposed on the substrate, a planarization layer disposed on the light emitting diode array layer, a composite medium layer disposed on the planarization layer, a metal gate line layer including a plurality of metal lines disposed on the composite medium layer, a fluorescent layer disposed on the metal gate line layer, and a diffusion layer disposed on the fluorescent layer, wherein the composite medium layer includes a first medium, a second medium, and a third medium, the second medium is interposed between the first medium and the third medium, and each of a refractive index of the first medium and a refractive index of the third medium is less than a refractive index of the second medium.
NEGATIVE TRANSCONDUCTANCE DEVICE AND MULTI-VALUED MEMORY DEVICE USING THE SAME
Disclosed are a negative transconductance device and a multi-valued memory device using the same. The negative transconductance includes a monolithic WSe.sub.2 semiconductor thin film; a first doped layer disposed on a first area of the WSe.sub.2 semiconductor thin film; a second doped layer disposed on a second area of the WSe.sub.2 semiconductor thin film so as to supply holes to the second area, wherein the second area is spaced apart from the first area; a first electrode electrically connected to the first area of the WSe.sub.2 semiconductor thin film; a second electrode electrically connected to the second area of the WSe.sub.2 semiconductor thin film; and a third electrode for applying a gate voltage to the first area and the second area of the WSe.sub.2 semiconductor thin film, and to a third area thereof located between the first and second areas.
Variable thickness diaphragm for a wideband robust piezoelectric micromachined ultrasonic transducer (PMUT)
A diaphragm for a piezoelectric micromachined ultrasonic transducer (PMUT) is presented having resonance frequency and bandwidth characteristics which are decoupled from one another into independent variables. Portions of at least the piezoelectric material layer and backside electrode layer are removed in a selected pattern to form structures, such as ribs, in the diaphragm which retains stiffness while reducing overall mass. The patterned structure can be formed by additive, or subtractive, fabrication processes.
Gate extraction and injection field effect transistors and method for controlling its channel carrier amount
The methods of gate extraction and injection FET and channel carrier quantity control related to microelectronics technology and semiconductor technology. The gate extraction and injection FET of the invention is provided with a source, a drain, a gate and a channel semiconductor area on the insulating layer. A gate dielectric layer is arranged between the gate and the channel semiconductor region, wherein, the gate dielectric layer is a thin film material with resistance values of 10.sup.3-10.sup.16Ω and the channel semiconductor region is a two-dimensional semiconductor or a three-dimensional semiconductor with two-dimensional semiconductor material characteristics (1-10 cellular crystal layers). The advantages of the invention are that the power consumptions of the devices and the integrated circuits can be greatly reduced by a few orders of magnitude.
SEMICONDUCTOR DEVICE INCLUDING ACTIVE REGION WITH VARIABLE ATOMIC CONCENTRATION OF OXIDE SEMICONDUCTOR MATERIAL AND METHOD OF FORMING THE SAME
A semiconductor device can include a semiconductor substrate and an active region in the semiconductor substrate, where the active region can include an oxide semiconductor material having a variable atomic concentration of oxygen. A first source/drain region can be in the active region, where the first source/drain region can have a first atomic concentration of oxygen in the oxide semiconductor material. A second source/drain region can be in the active region spaced apart from first source/drain region and a channel region can be in the active region between the first source/drain region and the second source/drain region, where the channel region can have a second atomic concentration of oxygen in the oxide semiconductor material that is less than the first atomic concentration of oxygen. A gate electrode can be on the channel region and extend between the first source/drain region and the second source/drain region.
Method of forming a semiconductor device including an active region with variable atomic concentration of oxide semiconductor material
A semiconductor device can include a semiconductor substrate and an active region in the semiconductor substrate, where the active region can include an oxide semiconductor material having a variable atomic concentration of oxygen. A first source/drain region can be in the active region, where the first source/drain region can have a first atomic concentration of oxygen in the oxide semiconductor material. A second source/drain region can be in the active region spaced apart from first source/drain region and a channel region can be in the active region between the first source/drain region and the second source/drain region, where the channel region can have a second atomic concentration of oxygen in the oxide semiconductor material that is less than the first atomic concentration of oxygen. A gate electrode can be on the channel region and extend between the first source/drain region and the second source/drain region.
Method of forming a semiconductor device including an active region with variable atomic concentration of oxide semiconductor material
A semiconductor device can include a semiconductor substrate and an active region in the semiconductor substrate, where the active region can include an oxide semiconductor material having a variable atomic concentration of oxygen. A first source/drain region can be in the active region, where the first source/drain region can have a first atomic concentration of oxygen in the oxide semiconductor material. A second source/drain region can be in the active region spaced apart from first source/drain region and a channel region can be in the active region between the first source/drain region and the second source/drain region, where the channel region can have a second atomic concentration of oxygen in the oxide semiconductor material that is less than the first atomic concentration of oxygen. A gate electrode can be on the channel region and extend between the first source/drain region and the second source/drain region.
Semiconductor device including active region with variable atomic concentration of oxide semiconductor material and method of forming the same
A semiconductor device can include a semiconductor substrate and an active region in the semiconductor substrate, where the active region can include an oxide semiconductor material having a variable atomic concentration of oxygen. A first source/drain region can be in the active region, where the first source/drain region can have a first atomic concentration of oxygen in the oxide semiconductor material. A second source/drain region can be in the active region spaced apart from first source/drain region and a channel region can be in the active region between the first source/drain region and the second source/drain region, where the channel region can have a second atomic concentration of oxygen in the oxide semiconductor material that is less than the first atomic concentration of oxygen. A gate electrode can be on the channel region and extend between the first source/drain region and the second source/drain region.
Die-on-Interposer Assembly with Dam Structure and Method of Manufacturing the Same
A semiconductor package includes an interposer chip having a frontside, a backside, and a corner area on the backside defined by a first corner edge and a second corner edge of the interposer chip. A die is bonded to the frontside of the interposer chip. At least one dam structure is formed on the corner area of the backside of the interposer chip. The dam structure includes an edge aligned to at least one the first corner edge and the second corner edge of the interposer chip.