A solder pad includes a surface. A tin layer is arranged on the surface. At least one out of a bismuth layer, an antimony layer and a nickel layer is arranged on the tin layer.

Pre-molded leadframes for semiconductor devices are manufactured by molding electrically insulating material onto a laminar sculptured structure of electrically conductive material including semiconductor device component die pads. First and second die pads are coupled via a first extension from the first die pad and a second extension from the second die pad at neighboring locations on the front surface of the leadframe and a bridge formation coupling the first and second extensions at the bacpk surface of the leadframe. The bridge formation provides a sacrificial connection between the first and second extensions which is selectively removed after molding the electrically insulating material in order to decouple the first and second die pads from each other. The removal of the sacrificial connection leaves a cavity formed at the second surface of the leadframe without affecting the shape of the die pads.

A semiconductor chip is arranged on a first surface of a die pad in a substrate (leadframe) including an array of electrically conductive leads. An encapsulation of laser direct structuring (LDS) material encapsulates the substrate and the semiconductor chip. The encapsulation has a first surface, a second surface opposed to the first surface and a peripheral surface. The array of electrically conductive leads protrude from the peripheral surface with areas of the second surface of the encapsulation arranged between adjacent leads. LDS structured areas of the second surface located between adjacent leads in the array of electrically conductive leads provide a further array of electrically conductive leads exposed at the second surface. First and second electrically conductive vias extending through the encapsulation material as well as electrically conductive lines over the encapsulation material provide an electrical bonding pattern between the semiconductor chip and selected ones of the leads.

A packaged semiconductor includes an electrically insulating encapsulant body having an upper surface, a first semiconductor die encapsulated within the encapsulant body, the first semiconductor die having a main surface with a first conductive pad that faces the upper surface of the encapsulant body, a second semiconductor die encapsulated within the encapsulant body and disposed laterally side by side with the first semiconductor die, the second semiconductor die having a main surface with a second conductive pad that faces the upper surface of the encapsulant body, and a first conductive track that is formed in the upper surface of the encapsulant body and electrically connects the first conductive pad to the second conductive pad. The encapsulant body includes a laser activatable mold compound.

A semiconductor device includes a substrate and a semiconductor die including an active surface with bond pads, an opposite inactive surface, and stepped side surfaces extending between the active surface and the inactive surface. The stepped side surfaces include a first planar surface extending from the inactive surface towards the active surface, a second planar surface extending from the active surface towards the inactive surface, and a side surface offset between the first planar surface and the second planar surface. The semiconductor device further includes an adhesive layer covering at least a portion of a surface area of the second surface and attaching the semiconductor die to the substrate.

A leadframe has a die pad area and an outer layer of a first metal having a first oxidation potential. The leadframe is placed in contact with a solution containing a second metal having a second oxidation potential, the second oxidation potential being more negative than the first oxidation potential. Radiation energy is then applied to the die pad area of the leadframe contacted with the solution to cause a local increase in temperature of the leadframe. As a result of the temperature increase, a layer of said second metal is selectively provided at the die pad area of the leadframe by a galvanic displacement reaction. An oxidation of the outer layer of the leadframe is then performed to provide an enhancing layer which counters device package delamination.

In some examples, a system comprises a die having multiple electrical connectors extending from a surface of the die and a lead coupled to the multiple electrical connectors. The lead comprises a first conductive member; a first non-solder metal plating stacked on the first conductive member; an electroplated layer stacked on the first non-solder metal plating; a second non-solder metal plating stacked on the electroplated layer; and a second conductive member stacked on the second non-solder metal plating, the second conductive member being thinner than the first conductive member. The system also comprises a molding to at least partially encapsulate the die and the lead.

A lead-frame assembly is disclosed, for a semiconductor die and comprising a die attach pad and a plurality of elongate leads spaced apart therefrom; wherein each elongate lead has a first proximal end portion, a second distal end portion and a middle portion therebetween; wherein the die attach pad and each of the plurality of elongate leads each comprise a coating-free portion, and a coated portion having a coating material thereon; wherein a part of a perimeter of the die attach pad proximal each lead is comprised in the coating-free portion, and wherein the proximal end portion of each elongate lead is comprised in the coating-free portion. Associated package assemblies and methods are also disclosed.

An intelligent power module includes: an encapsulating material structure; a lead frame which is at least partially encapsulated inside the encapsulating material structure, wherein all portions of the lead frame encapsulated inside the encapsulating material structure are at a same planar level; and a heat dissipation structure, which is connected to the lead frame.

Lead frames for semiconductor device packages may include lead fingers proximate to a die-attach pad. A convex corner of the lead frame proximate to a geometric center of the lead frame may be rounded to include a radius of curvature of at least two times a greatest thickness of the die-attach pad. The thickness of the die-attach pad may be measured in a direction perpendicular to a major surface of the die-attach pad. A shortest distance between the die-attach pad and each one of the lead fingers having a surface area larger than an average surface area of the lead fingers may be at least two times the greatest thickness of the die-attach pad.