Patent classifications
H01L21/603
Substrate bonding apparatus and method of manufacturing semiconductor device by using the substrate bonding apparatus
A substrate bonding apparatus includes a first bonding chuck configured to support a first substrate and a second bonding chuck configured to support a second substrate such that the second substrate faces the first substrate. The first bonding chuck includes a first base, a first deformable plate on the first base and configured to support the first substrate and configured to be deformed such that a distance between the first base and the first deformable plate is varied, and a first piezoelectric sheet on the first deformable plate and configured to be deformed in response to power applied thereto to deform the first deformable plate.
SEMICONDUCTOR DEVICE PACKAGE AND METHODS OF MANUFACTURE THEREOF
A method of manufacturing a packaged semiconductor device includes forming an assembly by placing a semiconductor die over a substrate with a die attach material between the semiconductor die and the substrate. A conformal structure which includes a pressure transmissive material contacts at least a portion of a top surface of the semiconductor die. A pressure is applied to the conformal structure and in turn, the pressure is transmitted to the top surface of the semiconductor die by the pressure transmissive material. While the pressure is applied, concurrently encapsulating the assembly with a molding compound and exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter.
GRINDABLE HEAT SINK FOR MULTIPLE DIE PACKAGING
A semiconductor package can include a semiconductor die stack including a top die and one or more core dies below the top die. The semiconductor package can further include a metal heat sink plated on a top surface of the top die and have a plurality of side surfaces coplanar with corresponding ones of a plurality of sidewalls of the semiconductor die stack. A molding can surround the stack of semiconductor dies and the metal heat sink, the molding including a top surface coplanar with an exposed upper surface of the metal heat sink. The top surface of the molding and the exposed upper surface of the metal heat sink are both mechanically altered. For example, the metal heat sink and the molding can be simultaneously ground with a grinding disc and can show grinding marks as a result.
GRINDABLE HEAT SINK FOR MULTIPLE DIE PACKAGING
A semiconductor package can include a semiconductor die stack including a top die and one or more core dies below the top die. The semiconductor package can further include a metal heat sink plated on a top surface of the top die and have a plurality of side surfaces coplanar with corresponding ones of a plurality of sidewalls of the semiconductor die stack. A molding can surround the stack of semiconductor dies and the metal heat sink, the molding including a top surface coplanar with an exposed upper surface of the metal heat sink. The top surface of the molding and the exposed upper surface of the metal heat sink are both mechanically altered. For example, the metal heat sink and the molding can be simultaneously ground with a grinding disc and can show grinding marks as a result.
HEAT TREATMENT APPARATUS
A chamber in which heating treatment is performed by irradiating a semiconductor wafer with light and a combustible gas supply source are connected in communication with each other by a combustible gas supply pipe. An electrical flow rate controller for regulating a supply flow rate of a combustible gas, and the like are interposed in the combustible gas supply pipe. Part of the combustible gas supply pipe which includes the electrical flow rate controller and the like that can be an ignition source is surrounded by an inner enclosure. Nitrogen which is a noncombustible gas is supplied to an inner space inside the inner enclosure. The noncombustible gas is supplied to the inner space, and a gas remaining in the inner space is discharged, whereby the concentration of oxygen in the inner space is decreased to below an explosion limit. This prevents fires and explosions of the combustible gas.
HEAT TREATMENT APPARATUS
A chamber in which heating treatment is performed by irradiating a semiconductor wafer with light and a combustible gas supply source are connected in communication with each other by a combustible gas supply pipe. An electrical flow rate controller for regulating a supply flow rate of a combustible gas, and the like are interposed in the combustible gas supply pipe. Part of the combustible gas supply pipe which includes the electrical flow rate controller and the like that can be an ignition source is surrounded by an inner enclosure. Nitrogen which is a noncombustible gas is supplied to an inner space inside the inner enclosure. The noncombustible gas is supplied to the inner space, and a gas remaining in the inner space is discharged, whereby the concentration of oxygen in the inner space is decreased to below an explosion limit. This prevents fires and explosions of the combustible gas.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor element, a first conductive member, a second conductive member, a connecting member, and a metal plate. The semiconductor element has an element obverse surface and an element reverse surface that are spaced apart from each other in a thickness direction. An obverse surface electrode is provided on the element obverse surface. The first conductive member faces the element reverse surface and is bonded to the semiconductor element. The first conductive member and the second conductive member are spaced apart from each other. The connecting member electrically connects the obverse surface electrode and the second conductive member. The metal plate is interposed between the obverse surface electrode and the connecting member in the thickness direction. The obverse surface electrode and the metal plate are bonded to each other by solid-phase diffusion.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor element, a first conductive member, a second conductive member, a connecting member, and a metal plate. The semiconductor element has an element obverse surface and an element reverse surface that are spaced apart from each other in a thickness direction. An obverse surface electrode is provided on the element obverse surface. The first conductive member faces the element reverse surface and is bonded to the semiconductor element. The first conductive member and the second conductive member are spaced apart from each other. The connecting member electrically connects the obverse surface electrode and the second conductive member. The metal plate is interposed between the obverse surface electrode and the connecting member in the thickness direction. The obverse surface electrode and the metal plate are bonded to each other by solid-phase diffusion.
SEMICONDUCTOR DEVICE MANUFACTURING DEVICE AND MANUFACTURING METHOD
A semiconductor device manufacturing device (10) includes a stage (12), an installing head (14) that has a chip holding surface (26) and disposes a chip (100) on a substrate (110), a measuring mechanism (16) that measures a tilt angle of the chip (100) loaded on an installing surface (112) of the substrate (110) by the installing head (14) with respect to the installing surface (112) as a detection tilt angle Sd, a holding surface adjusting mechanism (18) that changes a holding surface tilt angle Sb which is a tilt angle of the chip holding surface (26) with respect to a loading surface (21), and a controller (20) that calculates a correction amount C of the holding surface tilt angle Sb based on the detection tilt angle Sd and changes the holding surface tilt angle Sb by the holding surface adjusting mechanism (18) according to the calculated correction amount C.
CHIP PACKAGING STRUCTURE AND METHOD FOR PREPARING THE SAME, AND METHOD FOR PACKAGING SEMICONDUCTOR STRUCTURE
A chip packaging structure and a method for preparing the same, and a method for packaging a semiconductor structure are provided, which relate to the technical field of semiconductors, and solve the technical problem of low yield of a chip. The chip packaging structure includes: a chip, an intermediate insulating layer arranged on the chip and a non-conductive adhesive layer arranged on the intermediate insulating layer, where a plurality of conductive pillar bumps are arranged on the chip, and each conductive pillar bump penetrates through the intermediate insulating layer; the intermediate insulating layer is provided with at least one group of holding holes, and the non-conductive adhesive layer fills the holding holes, so that grooves respectively matched with the holding holes are formed in a surface, far away from the intermediate insulating layer, of the non-conductive adhesive layer.