Patent classifications
H01L21/76817
METHOD FOR CREATING PATTERNS
The invention relates in particular to a method for creating patterns in a layer (410) to be etched, starting from a stack comprising at least the layer (410) to be etched and a masking, layer (420) on top of the layer (410) to be etched, the masking layer (420) having at least one pattern (421), the method comprising at least; a) a step of modifying at least one zone (411) of the layer (410) to be etched via ion implantation (430) vertically in line with said at least one pattern (421); b) at least one sequence of steps comprising: b1) a step of enlarging (440) the at least one pattern (421) in a plane in which the layer (410) to be etched mainly extends; b2) a step of modifying at least one zone (411″, 411″) of the layer (410) to be etched via ion implantation (430) vertically in line with the at least one enlarged pattern (421), the implantation being carried out over a depth less than the implantation depth of the preceding, modification step;) c) a step of removing (461, 462) the modified zones (411, 411′, 41″), the removal comprising a step of etching the modified zones (411, 411′, 411″) selectively with respect to the non-modified zones (412) of the layer (410) to be etched.
SEMICONDUCTOR DEVICE AND IMPRINT METHOD
In general, according to one embodiment, there is provided a semiconductor device including a substrate, an insulating layer formed above the substrate, and a conductive layer provided in the insulating layer. The insulating layer includes at least one cellulose fiber.
PRINTING COMPONENTS TO SUBSTRATE POSTS WITH GAPS
A printed structure includes a substrate comprising a substrate surface, a substrate circuit disposed in or on in a circuit area of the substrate surface, a substrate post protruding from the substrate surface exterior to the circuit area, and a component having a component top side and a component bottom side opposite the component top side. The component bottom side can be disposed on the substrate post and adhered to the substrate surface forming an air gap between the component bottom side and the substrate circuit. The substrate post can comprise a substrate post material that is a cured adhesive. Some embodiments comprise a substrate electrode and the component comprises an electrically conductive connection post extending from the component bottom side toward the substrate in electrical contact with the substrate electrode.
COMPOSITION, PATTERN FORMING METHOD, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
According to one embodiment, a composition including a compound is provided. The compound includes a linking group containing 2 to 18 carbon atoms, a polymerizable functional group bonded to the linking group, a first reactive group bonded to the linking group, and a second reactive group bonded to the linking group. The polymerizable functional group includes at least one of a (meth)acryloyl group or a vinyl group. The first reactive group includes at least one selected from the group consisting of a thiol group, a disulfide group, and a thiocyanate group. The second reactive group includes at least one selected from the group consisting of an alkoxysilane group, a chlorosilane group, and a hydroxyl group.
FLUOROPOLYMER STAMP FABRICATION METHOD
An imprint lithography stamp includes a stamp body having a patterned surface and formed from a fluorinated ethylene propylene copolymer. The imprint lithography stamp further includes a backing plate with a plurality of through-holes with portions of the stamp body extending into the through-holes to adhere the stamp body to the backing plate. The patterned surface of the stamp body has a plurality of protrusions extending from the stamp body, which are used to form high aspect ratio features at high processing temperatures. A mold design for forming the imprint lithography stamp and an injection molding process for forming the imprint lithography stamp are also provided.
Imprint material
There is provided an imprint material that has sufficient adhesion to film substrates and excellent scratch resistance, and can be readily released from a mold at the time of mold release. An imprint material including: (A) a specific acrylamide such as N,N′-dimethylacrylamide; (B) a compound having alkylene oxide units and having 2 to 6 polymerizable groups at the ends of the compound, in which the alkylene oxide units are ethylene oxide units, propylene oxide units, or a combination thereof; and (C) a photopolymerization initiator.
DESIGN PATTERN GENERATION METHOD, TEMPLATE, AND METHOD FOR MANUFACTURING TEMPLATE
A design pattern generation method of an embodiment is a method for generating a design pattern of a template. The design pattern generation method includes: generating an actual pattern including a first pattern protruding from a contact surface of the template with a material layer and extending in a predetermined direction along the contact surface, and a second pattern further protruding from an upper surface of the first pattern; calculating a volume of the first pattern and the second pattern per unit area on the contact surface; and adding, when a difference in the volume of the first pattern and the second pattern per unit area between regions on the contact surface exceeds a specified value, a third pattern to a region where the volume of the first pattern and the second pattern per unit area is small.
WIRING STRUCTURE AND METHOD OF MANUFACTURING THE SAME, SEMICONDUCTOR DEVICE, MULTILAYER WIRING STRUCTURE AND METHOD OF MANUFACTURING THE SAME, SEMICONDUCTOR ELEMENT MOUNTING SUBSTRATE, METHOD OF FORMING PATTERN STRUCTURE, IMPRINT MOLD AND METHOD OF MANUFACTURING THE SAME, IMPRINT MOLD SET, AND METHOD OF MANUFACTURING MULTILAYER WIRING BOARD
A mold includes a mold base material and a rugged structure located at a main surface of the mold base material. The rugged structure includes a plurality of linearly shaped projected portions for forming wiring, and a circularly shaped projected portion for forming a pad portion, in which a light-shielding layer is provided at a top portion flat surface of the circularly shaped projected portion for forming the pad portion.
Enhancing light extraction of organic light emitting diodes via nanoscale texturing of electrode surfaces
An organic light emitting device is described, having an OLED including an anode, a cathode, and at least one organic layer between the anode and cathode. At least a portion of an electrode surface includes a plurality of scattering structures positioned in a partially disordered pattern resembling nodes of a two dimensional lattice. The scattering structures are positioned around the nodes of the two dimensional lattice with the average distance between the position of each scattering structure and a respective node of the lattice is from 0 to 0.5 of the distance between adjacent lattice nodes. A method of manufacturing an organic light emitting device and a method of enhancing the light-extraction efficiency of an organic light emitting device are also described.
PROCESS OF REALIZATION OF AN AREA OF INDIVIDUALIZATION OF AN INTEGRATED CIRCUIT
A method for producing an individualisation area includes providing at least a first level of the electrical tracks. The method includes depositing a dielectric layer and a deformable layer on the interconnection level. The method includes producing, in an area of the deformable layer, recessed patterns, by penetrating an imprint mould into the deformable layer, the production of the patterns being configured so that the patterns have a randomness in the deformable layer, thus forming random patterns. The method includes transferring the random patterns into the dielectric layer to form transferred random patterns therein and exposing the vias located in line with the transferred random patterns. The method includes filling the transferred random patterns with an electrically conductive material so as to form electrical connections between vias. The method includes producing a second level of the electrical tracks on the vias and the electrical connections.