Various embodiments of systems and methods for calibrating wafer inspection system modules are disclosed herein. More specifically, the present disclosure provides various embodiments of systems and methods to calibrate the multiple spectral band values obtained from a substrate by a camera system included within a WIS module. In one embodiment, multiple spectral band values are red, green, and blue (RGB) values. As described in more detail below, the calibration methods disclosed herein may use a test wafer having a predetermined pattern of thickness changes or color changes to generate multiple spectral band offset values. The multiple spectral band offset values can be applied to the multiple spectral band values obtained from the substrate to generate calibrated RGB values, which compensate for spectral responsivity differences between camera systems included within a plurality of WIS modules.

A method of manufacturing a display apparatus, the method includes supplying, from an ejector, a droplet onto a plane, capturing an image of the droplet, calculating a first luminance of a first area of the plane, the first area including a planar area of the droplet, and calculating a concentration of particles contained in the droplet based on the first luminance.

A semiconductor manufacturing apparatus includes an imaging device that images a die; a lighting device having a light source that is a point light source or a line light source; and a controller configured to apply a light beam to a part of the die by the light source to form a bright field area on the die, and repeat moving the bright field area at a predetermined pitch and imaging of the die to inspect an inside of the bright field area.

Systems and methods for monitoring copper corrosion in an integrated circuit (IC) device are disclosed. A corrosion-sensitive structure formed in the IC device may include a p-type active region adjacent an n-type active region to define a p-n junction space charge region. A copper region formed over the silicon may be connected to both the p-region and n-region by respective contacts, to thereby define a short circuit. Light incident on the p-n junction space charge region, e.g., during a CMP process, creates a current flow through the metal region via the short circuit, which drives chemical reactions that cause corrosion in the copper region. Due to the short circuit configuration, the copper region is highly sensitive to corrosion. The corrosion-sensitive structure may be arranged with less corrosion-sensitive copper structures in the IC device, with the corrosion-sensitive structure used as a proxy to monitor for copper corrosion in the IC device.

The present invention disclosures a recessed structure capable of being conveniently monitored online, wherein comprising a dielectric layer I, and a dielectric layer II positioned above the dielectric layer I, the dielectric layer I comprises a metal via layer and a metal contact layer, the metal contact layer is positioned above the metal via layer; the dielectric layer II comprises an inverted trapezoid groove positioned above the metal contact layer, the inverted trapezoid groove has inclined sidewall, and the horizontal cross-sectional area of the inverted trapezoid groove far away from the metal contact layer is larger than the horizontal cross-sectional area of the inverted trapezoid groove close to the metal contact layer; the inclined sidewall is covered with a reflective film. The present invention provided the recessed structure capable of being conveniently monitored online and a preparation method thereof, by an alternating bright and dark annular image formed by a monitoring system, it can quickly identify defects in the recessed structure.

Systems and methods to achieve desired color accuracy, power consumption, and gamma correction in an array of pixels of a micro-LED display. The method and system provides an array of pixels, wherein each pixel comprising a plurality of sub-pixels arranged in a matrix and a driving circuitry configured to provide an individual emission control signal to each sub-pixel of each pixel in the array of pixels to independently control an emission time and a duty cycle of each sub-pixel.

A method for manufacturing an electronic device includes providing a substrate, forming a plurality of connecting pads and a plurality of conductive portions partially overlapped by the plurality of connecting pads on a surface of the substrate; forming a plurality of conductive lines on the substrate, wherein the plurality of conductive lines are electrically connected to the plurality of conductive portions; and bonding a plurality of light emitting units to the plurality of connecting pads. The method may further includes identifying a defective light emitting unit from the plurality of light emitting units; removing the defective light emitting unit from a corresponding position on the substrate; and bonding-another light emitting unit to the corresponding position.

A semiconductor device includes a substrate; a semiconductor chip located on the substrate; a sealing resin covering the substrate and the semiconductor chip; and a mottled pattern located at an interface between the sealing resin and at least one of the substrate or the semiconductor chip.

A method of evaluating a defect area on a wafer, the method including preparing a mirror-polished wafer, heat-treating the wafer, cleaning the wafer to remove an oxide film formed during the heat-treating, polishing the wafer, and evaluating a defect on a surface of the wafer, is disclosed.

Disclosed are a method of forming an optical proximity correction (OPC) model and/or a method of fabricating a semiconductor device using the same. The method of forming the OPC model may include obtaining a scanning electron microscope (SEM) image, which is an average image of a plurality of images taken using one or more scanning electron microscopes, and a graphic data system (GDS) image, which is obtained by imaging a designed layout, aligning the SEM image and the GDS image, performing an image filtering process on the SEM image, extracting a contour from the SEM image, and verifying the contour. The verifying of the contour may be performed using a genetic algorithm. Variables in the genetic algorithm may include first parameters related to the image alignment process, second parameters related to the image filtering process, and third parameters related to a critical dimension (CD) measurement process.