A semiconductor device includes a substrate having an upper surface and a lower surface, a metal layer provided on the lower surface of the substrate, a semiconductor element including first electrodes provided on the upper surface of the substrate, connected to the metal layer via through holes penetrating the substrate, and electrically separated from each other on the upper surface of the substrate, second electrodes provided on the upper surface of the substrate and alternately provided with the first electrodes, and a first pad provided on the upper surface of the substrate and to which the second electrodes are connected, and a protective film provided on the upper surface of the substrate to cover the first electrodes and the second electrodes, having a first opening that exposes at least a part of the first pad, and having no opening that overlaps the first electrodes.

A semiconductor device includes a first metal interconnection disposed on a substrate, a second metal interconnection disposed on the first metal interconnection, a first contact via disposed between the first metal interconnection and the second metal interconnection, a first serpent metal line connecting to a first end of the first metal interconnection, and a second serpent metal line connecting to a second end of the first metal interconnection. Preferably, the first serpent metal line, the second serpent metal line, and the first metal interconnection are on a same level.

A method for manufacturing an electronic device is provided, the method includes: providing an inspection module to inspect a first area of the electronic device to obtain a first information and inspect a second area of the electronic device to obtain a second information; transmitting the first information and the second information to a processing system; comparing the first information and the second information to obtain a difference; and transmitting a correction information to a first process machine via a first interface system. When the difference is greater than or equal to -2 and less than or equal to 2, the first process machine is started to produce. An electronic device is also provided.

The embodiments of the present disclosure provide a semiconductor base plate and a test method thereof. When a first test line and a second test line in the semiconductor base plate are tested, a resistivity of the first test line can be tested by directly loading voltages to a first test pad and a second test pad after a first conductive layer is formed and before a first insulating layer is formed. After a second conductive layer is formed, a resistivity of the second test line is tested by loading voltages to a third test pad and a fourth test pad.

A semiconductor structure includes the following: a semiconductor substrate; a first metal layer, located on a surface of the semiconductor substrate; a second metal layer, located above a surface of the first metal layer; an insulating layer, located between the first metal layer and the second metal layer, and configured to isolate the first metal layer and the second metal layer; a test via, penetrating through the insulating layer and connecting the first metal layer with the second metal layer through a conductive material in the test via; and at least a pair of dummy vias, penetrating through the insulating layer and connected to any one of the first metal layer and the second metal layer.

A semiconductor structure includes: a semiconductor substrate; a first metal layer located on a surface of the semiconductor substrate; a second metal layer located above a surface of the first metal layer; an insulating layer located between the first metal layer and the second metal layer and configured to isolate the first metal layer from the second metal layer; and at least four vias located in the insulating layer and a conductive material for connecting the first metal layer and the second metal layer is filled in the at least four vias.

The present disclosure provides an electronic device and a manufacturing method thereof. The electronic device includes a connecting element. The connecting element includes a first conductive line segment, a second conductive line segment, and a first connecting line segment. The first conductive line segment is electrically connected to the second conductive line segment through the first connecting line segment. In a vertical projection direction, the first connecting line segment has a first height, the first conductive line segment has a second height, and the first height is different from the second height.

A semiconductor package includes a semiconductor chip including a second bonding insulating layer surrounding at least a portion of each of a first bonding pad structure and a second bonding pad structure, in which the first bonding pad structure includes a first contact portion, a first bonding pad, and a first seed layer disposed between the first bonding pad and the first contact portion and extending in a first direction, the second bonding pad structure includes a second contact portion, a second bonding pad, and a second seed layer disposed between the second bonding pad and the second contact portion and extending in the first direction, and the second bonding insulating layer is in contact with a side surface of each of the first and second seed layers and the first and second bonding pads.

A display module including a glass substrate; a thin film transistor layer disposed in a first area of the glass substrate; a plurality of connection pads disposed in a second area extending from the first area of the glass substrate and electrically connected to the thin film transistor layer; a plurality of test pads disposed in a third area extending from the second area of the glass substrate and electrically connected to the plurality of connection pads, respectively, and a plurality of connection wirings electrically connecting the plurality of connection pads and the plurality of test pads.

A semiconductor package test system includes a test pack on which a semiconductor package is loaded, and a semiconductor package testing apparatus. The semiconductor package testing apparatus includes a receiving section that receives the test pack. The receiving section includes a pack receiving slot into which the test pack is inserted. The test pack includes a chuck on which the semiconductor package is fixed, a probe block disposed above the chuck, and a connection terminal. The receiving section includes a receiving terminal that is electrically connected to the connection terminal when the receiving terminal contacts the connection terminal. The probe block includes at least one needle configured to be electrically connected to the semiconductor package disposed on the chuck upon the chuck moving toward the semiconductor package. The receiving section is provided in plural.