Patent classifications
H01L2221/1073
Flexible and stretchable interconnects for flexible systems
A flexible device includes: (1) a flexible substrate; and (2) an interconnect disposed over the flexible substrate, wherein the interconnect has a varying vertical displacement along its length, relative to a top surface of the flexible substrate.
Pressurizing members for semiconductor package
Provided is a pressurized semiconductor package including a lead frame including a pad board and a first terminal, a semiconductor chip, pressurizing members stacked to pressurize the semiconductor chip, and a package housing. The semiconductor chip is physically pressurized by the pressurizing members and is electrically connected to improve durability of the semiconductor package and to simplify a manufacturing process.
Treatment to interface between metal film and BARC or photoresist
A method of manufacturing a semiconductor device is disclosed. In the method, a metallic layer is formed over a substrate, the metallic layer is surface-treated with an alkaline solution, and a bottom anti-reflective coating (BARC) layer is formed on the surface-treated metallic layer.
Semiconductor structure and method for fabricating the same
A semiconductor structure and a method of fabricating the same is disclosed. The semiconductor structure includes an interconnect structure that comprises: a plurality of conductive features over a substrate arranged separately adjacent one another; a liner conformally formed over and between the plurality of conductive features and defining a trench having a first depth between adjacent pair of the conducive features, wherein a horizontal coverage of the liner over respective top surfaces of the conductive features has thickness lower than that of a vertical coverage over respective sidewalls of the conductive features; and a dielectric layer on the liner over top surfaces of the conductive features, wherein the dielectric layer seals the respective trench and forms a void between adjacent pair of the conductive features.
METHODS FOR RELIABLY FORMING MICROELECTRONIC DEVICES WITH CONDUCTIVE CONTACTS TO SILICIDE REGIONS, AND RELATED SYSTEMS
Microelectronic devices—having at least one conductive contact structure adjacent a silicide region—are formed using methods that avoid unintentional contact expansion and contact reduction. A first metal nitride liner is formed in a contact opening, and an exposed surface of a polysilicon structure is thereafter treated (e.g., cleaned and dried) in preparation for formation of a silicide region. During the pretreatments (e.g., cleaning and drying), neighboring dielectric material is protected by the presence of the metal nitride liner, inhibiting expansion of the contact opening. After forming the silicide region, a second metal nitride liner is formed on the silicide region before a conductive material is formed to fill the contact opening and form a conductive contact structure (e.g., a memory cell contact structure, a peripheral contact structure).
PRESSURIZED SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
Provided is a pressurized semiconductor package including a lead frame including a pad board and a first terminal, a semiconductor chip, pressurizing members stacked to pressurize the semiconductor chip, and a package housing. The semiconductor chip is physically pressurized by the pressurizing members and is electrically connected to improve durability of the semiconductor package and to simplify a manufacturing process.
Microelectronic devices with conductive contacts to silicide regions, and related devices
Microelectronic devices—having at least one conductive contact structure adjacent a silicide region—are formed using methods that avoid unintentional contact expansion and contact reduction. A first metal nitride liner is formed in a contact opening, and an exposed surface of a polysilicon structure is thereafter treated (e.g., cleaned and dried) in preparation for formation of a silicide region. During the pretreatments (e.g., cleaning and drying), neighboring dielectric material is protected by the presence of the metal nitride liner, inhibiting expansion of the contact opening. After forming the silicide region, a second metal nitride liner is formed on the silicide region before a conductive material is formed to fill the contact opening and form a conductive contact structure (e.g., a memory cell contact structure, a peripheral contact structure).
METHODS FOR RELIABLY FORMING MICROELECTRONIC DEVICES WITH CONDUCTIVE CONTACTS TO SILICIDE REGIONS, AND RELATED DEVICES
Microelectronic devices—having at least one conductive contact structure adjacent a silicide region—are formed using methods that avoid unintentional contact expansion and contact reduction. A first metal nitride liner is formed in a contact opening, and an exposed surface of a polysilicon structure is thereafter treated (e.g., cleaned and dried) in preparation for formation of a silicide region. During the pretreatments (e.g., cleaning and drying), neighboring dielectric material is protected by the presence of the metal nitride liner, inhibiting expansion of the contact opening. After forming the silicide region, a second metal nitride liner is formed on the silicide region before a conductive material is formed to fill the contact opening and form a conductive contact structure (e.g., a memory cell contact structure, a peripheral contact structure).
SEMICONDUCTOR STRUCTURE AND METHOD FOR FABRICATING THE SAME
A semiconductor structure and a method of fabricating the same is disclosed. The semiconductor structure includes an interconnect structure that comprises: a plurality of conductive features over a substrate arranged separately adjacent one another; a liner conformally formed over and between the plurality of conductive features and defining a trench having a first depth between adjacent pair of the conducive features, wherein a horizontal coverage of the liner over respective top surfaces of the conductive features has thickness lower than that of a vertical coverage over respective sidewalls of the conductive features; and a dielectric layer on the liner over top surfaces of the conductive features, wherein the dielectric layer seals the respective trench and forms a void between adjacent pair of the conductive features.
Metal Contact Structure and Method of Forming the Same in a Semiconductor Device
A semiconductor device and method of formation are provided. The semiconductor device comprises a silicide layer over a substrate, a metal plug in an opening defined by a dielectric layer over the substrate, a first metal layer between the metal plug and the dielectric layer and between the metal plug and the silicide layer, a second metal layer over the first metal layer, and an amorphous layer between the first metal layer and the second metal layer.