A process for bonding chips to a substrate by direct bonding includes providing a support with which the chips are in contact, the chips in contact with the support being separate from one another. This bonding process also includes forming a liquid film on one face of the substrate, bringing the chips into contact with the liquid film, where the action of bringing the chips into contact with the liquid film causes attraction of the chips toward the substrate, and evaporating the liquid film in order to bond the chips to the substrate by direct bonding.

This disclosure teaches methods for making high-temperature superconducting striated tape combinations and the product high-temperature superconducting striated tape combinations. This disclosure describes an efficient and scalable method for aligning and bonding two superimposed high-temperature superconducting (HTS) filamentary tapes to form a single integrated tape structure. This invention aligns a bottom and top HTS tape with a thin intervening insulator layer with microscopic precision, and electrically connects the two sets of tape filaments with each other. The insulating layer also reinforces adhesion of the top and bottom tapes, mitigating mechanical stress at the electrical connections. The ability of this method to precisely align separate tapes to form a single tape structure makes it compatible with a reel-to-reel production process.

A display device manufacturing substrate according to the present disclosure comprises: a base part; assembly electrodes which extend in one direction and which are arranged on the base part; a dielectric layer formed on the base part to cover the assembly electrodes; a partitioning part formed on the dielectric layer; and cells which are formed in a plurality of rows and columns by means of the partitioning part, and on which semiconductor light-emitting elements are loaded, wherein the assembly electrodes extend in either the row direction or the column direction to overlap cells in the extending direction, and the assembly electrodes comprise a first assembly electrode overlapping cells that form one row or column, and a second assembly electrode simultaneously overlapping cells that form different rows or columns which are adjacent.

A package includes a semiconductor carrier, a first die, a second die, a first encapsulant, a second encapsulant, and an electron transmission path. The first die is disposed over the semiconductor carrier. The second die is stacked on the first die. The first encapsulant laterally encapsulates the first die. The second encapsulant laterally encapsulates the second die. The electron transmission path is electrically connected to a ground voltage. A first portion of the electron transmission path is embedded in the semiconductor carrier, a second portion of the electron transmission path is aside the first die and penetrates through the first encapsulant, and a third portion of the electron transmission path is aside the second die and penetrates through the second encapsulant.

A method for transferring alignment marks between substrate systems includes providing a substrate having semiconductor devices and alignment marks in precise alignment with the semiconductor devices; and physically transferring and bonding the semiconductor devices and the alignment marks to a temporary substrate of a first substrate system. The method can also include physically transferring and bonding the semiconductor devices and the alignment marks to a mass transfer substrate of a second substrate system; and physically transferring and bonding the semiconductor devices and the alignment marks to a circuitry substrate of a third substrate system. A system for transferring alignment marks between substrate systems includes the substrate having the semiconductor devices and the alignment marks in precise alignment with the semiconductor devices. The system also includes the first substrate system, and can include the second substrate system and the third substrate system.

A wafer carrier includes a pocket sized and shaped to accommodate a wafer, the pocket having a base and a substantially circular perimeter, and a removable orientation marker, the removable orientation marker comprising an outer surface and an inner surface, the outer surface having an arcuate form sized and shaped to mate with the substantially circular perimeter of the pocket, and the inner surface comprising a flat face, wherein the removable orientation marker further comprises a notch at a first end of the flat face.

A manufacturing method of a chip-attached substrate includes preparing a stacked substrate including multiple chips, a first substrate to which the multiple chips are temporarily bonded, and a second substrate bonded to the first substrate with the multiple chips therebetween; and separating the multiple chips bonded to the first substrate and the second substrate from the first substrate to bond the multiple chips to one surface of a third substrate including a device layer.

A semiconductor encapsulation method, comprising: forming a protection layer on a front side of a chip to be encapsulated; arranging said chip, with the protection layer being formed on the front side thereof, on a carrier plate, wherein the front side of said chip faces upwards and a back side thereof faces the carrier plate; and encapsulating, on the carrier plate, said chip and the protection layer to form a plastic encapsulation layer. Further provided is a semiconductor encapsulation structure.

The application discloses a light-emitting device including a carrier which includes an insulating layer, an upper conductive layer formed on the insulating layer, a plurality of conducting vias passing through the insulating layer, and a lower conductive layer formed under the insulating layer; four light-emitting elements arranged in rows and columns flipped on the carrier; and a light-passing unit formed on the carrier and covering the four light-emitting elements; wherein each of the light-emitting elements including a first light-emitting bare die emitting a first dominant wavelength, a second light-emitting bare die emitting a second dominant wavelength, and a third light-emitting bare die emitting a third dominant wavelength; and wherein two adjacent first light-emitting bare die in a row has a first distance W1, two adjacent first light-emitting bare die in a column has a second distance W2, and W1 is the same as W2.

According to an aspect, a manufacturing method of a display device includes: obtaining a first reference position on a surface of a holding substrate based on positions of a plurality of first alignment marks of the holding substrate; and aligning the holding substrate with a transfer destination substrate such that the first reference position on the holding substrate and a second reference position on a surface of the transfer destination substrate coincide. The holding substrate is sectioned into a plurality of first sections and a plurality of second sections when viewed from one direction. Each of the first sections is provided in a part of a gap between the second sections when viewed from the one direction, has a light transmission rate higher than a light transmission rate of the second sections, and forms the first alignment mark through which light passes when viewed from the one direction.