A semiconductor module includes a semiconductor element, a wiring board on which the semiconductor element is mounted, and a heat dissipation base including a first surface having a first region in which the wiring board is bonded and a second surface opposite to the first surface. The heat dissipation base is warped to be convexed in a direction from the first surface toward the second surface. The heat dissipation base has a plurality of fastening holes respectively provided at respective ones of a plurality of corner portions of the heat dissipation base, and a plurality of recesses provided in the first surface in respective ones of a plurality of peripheral areas. The plurality of peripheral areas are respectively located in a second region excluding the first region, at a peripheral edge of the first surface around respective ones of the plurality of fastening holes.

A power semiconductor module includes: a first substrate; a first power semiconductor die attached to the first substrate; and a first metallic clip having a plurality of first contact regions ultrasonically welded to either a first metallic region of the first substrate or a first metallic region of the first power semiconductor die. The first contact regions of the first metallic clip are laterally separated from one another by a first gap in the first metallic clip. Additional power semiconductor module embodiments and corresponding methods of production are also described herein.

A power module includes: a substrate having a patterned metallization on an electrically insulative body; first power transistor dies of a first transistor type attached to the substrate; and second power transistor dies of a second transistor type different than the first transistor type attached to the substrate. A first one or more of the first power transistor dies and a first one or more of the second power transistor dies are electrically connected in parallel via the patterned metallization to form a first topological switch. A second one or more of the first power transistor dies and a second one or more of the second power transistor dies are electrically connected in parallel via the patterned metallization to form a second topological switch. The first topological switch and the second topological switch are electrically connected in series via the patterned metallization. Additional power module embodiments are described.

Methods, systems, and devices for an output driver with compact inductive peaking are described. A memory system may implement a circuit for communicating signaling with a host system. The circuit may include a transmission component for transmitting signaling, and a reception component for receiving signaling, where the transmission component and the reception component are coupled with a pad. The circuit may include a current stabilization component and a drain capacitor to store charge associated with the transmission component. The circuit may include a series inductor coupled with the transmission component, the reception component, the drain capacitor, the current stabilization component, and the pad. A capacitance of the pad may be based on a resistance and an inductance of the series inductor.