Patent classifications
H01L2224/13001
Package comprising a substrate with interconnect routing over solder resist layer and an integrated device coupled to the substrate and method for manufacturing the package
A package comprising a substrate and an integrated device coupled to the substrate. The substrate includes (i) at least one inner dielectric layer, (ii) a plurality of interconnects located in the at least one inner dielectric layer, where the plurality of interconnects includes a pad located on a bottom metal layer of the substrate, (iii) an outer dielectric layer located over the at least one dielectric layer, (iv) at least one routing interconnect coupled to the plurality of interconnects, where the at least one routing interconnect is located over the outer dielectric layer, where the at least one routing interconnect is located below the bottom metal layer of the substrate, and (v) a cover dielectric layer located over the outer dielectric layer and the at least one routing interconnect. The package includes a solder interconnect coupled to the pad located on the bottom metal layer of the substrate.
PACKAGE COMPRISING A SUBSTRATE WITH INTERCONNECT ROUTING OVER SOLDER RESIST LAYER
A package comprising a substrate and an integrated device coupled to the substrate. The substrate includes (i) at least one inner dielectric layer, (ii) a plurality of interconnects located in the at least one inner dielectric layer, where the plurality of interconnects includes a pad located on a bottom metal layer of the substrate, (iii) an outer dielectric layer located over the at least one dielectric layer, (iv) at least one routing interconnect coupled to the plurality of interconnects, where the at least one routing interconnect is located over the outer dielectric layer, where the at least one routing interconnect is located below the bottom metal layer of the substrate, and (v) a cover dielectric layer located over the outer dielectric layer and the at least one routing interconnect. The package includes a solder interconnect coupled to the pad located on the bottom metal layer of the substrate.
Semiconductor device with hollow interconnectors
The present application discloses a semiconductor device. The semiconductor device includes a package structure including a first side and a second side opposite to the first side; an interposer structure positioned over the first side of the package structure; a first die positioned over the interposer structure; a second die positioned over the interposer structure; and a plurality of bottom interconnectors positioned on the second side of the package structure, and respectively including: a bottom exterior layer positioned on the second side of the to package structure; and a cavity enclosed by the bottom exterior layer.
SEMICONDUCTOR DEVICE WITH HOLLOW INTERCONNECTORS
The present application discloses a semiconductor device. The semiconductor device includes a package structure including a first side and a second side opposite to the first side; an interposer structure positioned over the first side of the package structure; a first die positioned over the interposer structure; a second die positioned over the interposer structure; and a plurality of bottom interconnectors positioned on the second side of the package structure, and respectively including: a bottom exterior layer positioned on the second side of the package structure; and a cavity enclosed by the bottom exterior layer.
Semiconductor package including a support solder ball
A semiconductor package including: a first substrate; a first semiconductor device on the first substrate; a first mold layer covering the first semiconductor device; a second substrate on the first mold layer; a support solder ball interposed between the first substrate and the second substrate, and electrically disconnected from the first substrate or the second substrate, wherein the support solder ball includes a core and is disposed near a first sidewall of the first semiconductor device; and a substrate connection solder ball disposed between the first sidewall of the first semiconductor device and the support solder ball to electrically connect the first substrate to the second substrate, wherein a top surface of the first semiconductor device has a first height from a top surface of the first substrate, and the core has a second height which is equal to or greater than the first height.
Semiconductor device with hollow interconnectors
The present application discloses a semiconductor device. The semiconductor device includes a package structure including a first side and a second side opposite to the first side; an interposer structure positioned over the first side of the package structure; a first die positioned over the interposer structure; a second die positioned over the interposer structure; and a plurality of bottom interconnectors positioned on the second side of the package structure, and respectively including: a bottom exterior layer positioned on the second side of the package structure; and a cavity enclosed by the bottom exterior layer.