Embodiments include a wafer-on-wafer bonding where each wafer includes a seal ring structure around die areas defined in the wafer. Embodiments provide a further seal ring spanning the interface between the wafers. Embodiments may extend the existing seal rings of the wafers, provide an extended seal ring structure separate from the existing seal rings of the wafers, or combinations thereof.

A semiconductor package includes a plurality of semiconductor chips on a substrate. The semiconductor chips include a first semiconductor chip, a second semiconductor chip, and a third semiconductor chip that are sequentially stacked on the substrate. The semiconductor package further includes a plurality of non-conductive layers between the substrate and the first semiconductor chip and between adjacent semiconductor chips among the semiconductor chips. The semiconductor chips include smaller widths as a distance from the substrate increases. Each of the non-conductive layers includes an extension protruding outward from a side surface of an overlying one of the semiconductor chips.

Embodiments include a wafer-on-wafer bonding where each wafer includes a seal ring structure around die areas defined in the wafer. Embodiments provide a further seal ring spanning the interface between the wafers. Embodiments may extend the existing seal rings of the wafers, provide an extended seal ring structure separate from the existing seal rings of the wafers, or combinations thereof.

Embodiments include a wafer-on-wafer bonding where each wafer includes a seal ring structure around die areas defined in the wafer. Embodiments provide a further seal ring spanning the interface between the wafers. Embodiments may extend the existing seal rings of the wafers, provide an extended seal ring structure separate from the existing seal rings of the wafers, or combinations thereof.

A light emitting device package according to an embodiment may include a first package body including first and second openings passing through the upper surface and lower surface thereof; a second package body disposed on the first package body and including a third opening passing through the upper surface and lower surface thereof; a light emitting device disposed in the third opening; a first resin disposed between the upper surface of the first package body and the light emitting device; and a second resin disposed in the third opening. According to the embodiment, the upper surface of the first package body may be coupled to the lower surface of the second package body, the first package body may include a recess recessed from the upper surface of the first package body to the lower surface of the first package body, the first resin may be disposed in the recess, the first resin and the second resin include materials different from each other, and the first resin may be in contact with the light emitting device and the second resin.

A light emitting device package according to an embodiment may include a first package body including first and second openings passing through the upper surface and lower surface thereof; a second package body disposed on the first package body and including a third opening passing through the upper surface and lower surface thereof; a light emitting device disposed in the third opening; a first resin disposed between the upper surface of the first package body and the light emitting device; and a second resin disposed in the third opening. According to the embodiment, the upper surface of the first package body may be coupled to the lower surface of the second package body, the first package body may include a recess recessed from the upper surface of the first package body to the lower surface of the first package body, the first resin may be disposed in the recess, the first resin and the second resin include materials different from each other, and the first resin may be in contact with the light emitting device and the second resin.

A structure for a semiconductor device includes a copper (Cu) layer and a first nickel (Ni) alloy layer with a Ni grain size a.sub.1. The structure also includes a second Ni alloy layer with a Ni grain size a.sub.2, wherein a.sub.1<a.sub.2. The first Ni alloy layer is between the Cu layer and the second Ni alloy layer. The structure further includes a tin (Sn) layer. The second Ni alloy layer is between the first Ni alloy layer and the Sn layer.

A structure for a semiconductor device includes a copper (Cu) layer and a first nickel (Ni) alloy layer with a Ni grain size a.sub.1. The structure also includes a second Ni alloy layer with a Ni grain size a.sub.2, wherein a.sub.1<a.sub.2. The first Ni alloy layer is between the Cu layer and the second Ni alloy layer. The structure further includes a tin (Sn) layer. The second Ni alloy layer is between the first Ni alloy layer and the Sn layer.

A detection structure and a detection method are provided. The method includes the following. A display backplane, a detection circuit board, and a detection light-emitting diode (LED) chip are provided. The detection circuit board is disposed on the display backplane, to connect a first detection line on the detection circuit board with a first contact electrode and connect a second detection line on the detection circuit board with a second contact electrode. A drive signal is output via the display backplane to the first detection line and the second detection line. A contact electrode pair on the display backplane corresponding to the detection LED chip is determined to be abnormal on condition that the detection LED chip is unlighted.

A detection structure and a detection method are provided. The method includes the following. A display backplane, a detection circuit board, and a detection light-emitting diode (LED) chip are provided. The detection circuit board is disposed on the display backplane, to connect a first detection line on the detection circuit board with a first contact electrode and connect a second detection line on the detection circuit board with a second contact electrode. A drive signal is output via the display backplane to the first detection line and the second detection line. A contact electrode pair on the display backplane corresponding to the detection LED chip is determined to be abnormal on condition that the detection LED chip is unlighted.