Patent classifications
H
ELECTRICITY
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H01
ELECTRIC ELEMENTS
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H01L
SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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2224/00
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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H01L2224/01
Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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H01L2224/10
Bump connectors; Manufacturing methods related thereto
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H01L2224/12
Structure, shape, material or disposition of the bump connectors prior to the connecting process
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H01L2224/14
of a plurality of bump connectors
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H01L2224/1414
Circular array, i.e. array with radial symmetry
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H01L2224/14143
with a staggered arrangement, e.g. depopulated array
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H01L2224/14146
Covering only the central area of the surface to be connected, i.e. central arrangements
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H01L2224/14146

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
20240321797 · 2024-09-26 ·

According to one embodiment, a semiconductor device includes a semiconductor substrate and an array portion. The array portion includes a plurality of metal portions arranged on the semiconductor substrate. When a virtual quadrilateral circumscribing minimally a contour shape of the array portion on the semiconductor substrate is set, the contour shape of the array portion does not overlap each of four vertices of the virtual quadrilateral.

Chip package and method for fabricating the same
09881889 · 2018-01-30 · ·

A chip package is provided, in which includes: a packaging substrate, a chip and a plurality solder balls interposed between the packaging substrate and the chip for bonding the packaging substrate and the chip, wherein the solder balls include a first portion of a first size and a second portion of a second size that is different from the first size.

Chip package and method for fabricating the same
09881889 · 2018-01-30 · ·

A chip package is provided, in which includes: a packaging substrate, a chip and a plurality solder balls interposed between the packaging substrate and the chip for bonding the packaging substrate and the chip, wherein the solder balls include a first portion of a first size and a second portion of a second size that is different from the first size.