A semiconductor package includes a first chip, an insulating protection layer, a second chip, a plurality of second conductive bumps and an underfill. The insulating protection layer is disposed on a first active surface of the first chip and includes a concave. Projections of a plurality of first inner pads and a plurality of first outer pads of the first chip projected on the insulating protection layer are located in the concave and out of the concave, respectively. The second chip is flipped on the concave and includes a plurality of second pads. Each of the first inner pads is electrically connected to the corresponding second pad through the corresponding second conductive bump. The underfill is disposed between the concave and the second chip and covers the second conductive bumps.

A chip package module is provided. The chip package module includes a package substrate, a chip, and a conductive connector assembly. The chip having a first surface and a second surface opposite thereto is disposed on the package substrate. The first surface is divided into a first region, a second region, and a third region, and the second region is located between the first and third regions. The chip includes a flip-chip pad group disposed in the first region, a wire-bonding pad group disposed in the third region, and a signal pad group disposed in the second region. The conductive connector assembly is electrically connected between the chip and the package substrate. One of the flip-chip pad group and the wire-bonding pad group is electrically and physically connected to the conductive connector assembly, and the other one is not physically connected to the conductive connector assembly.

A chip package module is provided. The chip package module includes a package substrate, a chip, and a conductive connector assembly. The chip having a first surface and a second surface opposite thereto is disposed on the package substrate. The first surface is divided into a first region, a second region, and a third region, and the second region is located between the first and third regions. The chip includes a flip-chip pad group disposed in the first region, a wire-bonding pad group disposed in the third region, and a signal pad group disposed in the second region. The conductive connector assembly is electrically connected between the chip and the package substrate. One of the flip-chip pad group and the wire-bonding pad group is electrically and physically connected to the conductive connector assembly, and the other one is not physically connected to the conductive connector assembly.

A semiconductor package structure is provided. The semiconductor package structure includes a semiconductor body and a conductive structure disposed below the semiconductor body. The semiconductor package structure also includes an insulating layer surrounding the conductive structure. The semiconductor package structure further includes a redistribution layer structure coupled to the conductive structure. In addition, the semiconductor package structure includes a molding compound surrounding the semiconductor body. A portion of the molding compound extends between the redistribution layer structure and the semiconductor body.