A packaged semiconductor includes an electrically insulating encapsulant body having an upper surface, a first semiconductor die encapsulated within the encapsulant body, the first semiconductor die having a main surface with a first conductive pad that faces the upper surface of the encapsulant body, a second semiconductor die encapsulated within the encapsulant body and disposed laterally side by side with the first semiconductor die, the second semiconductor die having a main surface with a second conductive pad that faces the upper surface of the encapsulant body, and a first conductive track that is formed in the upper surface of the encapsulant body and electrically connects the first conductive pad to the second conductive pad. The encapsulant body includes a laser activatable mold compound.

A display device includes: a substrate; a plurality of pixel columns on the substrate, each of the plurality of pixel columns including a plurality of pixel groups each including a first pixel and a second pixel arranged along a first direction; and a bank enclosing a perimeter of each of the plurality of pixel groups, the bank including a first opening corresponding to each of the plurality of pixel groups, and a second opening located between two pixel groups adjacent to each other in the first direction among the plurality of pixel groups.

A display device is provided. The display device comprising: a substrate including a display area and a pad area, a first conductive layer disposed on the substrate and including a first signal line disposed in the display area, a buffer layer disposed on the first conductive layer, a semiconductor layer disposed on the buffer layer in the display area, a gate insulating film disposed on the semiconductor layer, a second conductive layer disposed on the gate insulating film and including a gate electrode overlapping the semiconductor layer in the display area, a first electrode of a transistor disposed to overlap one side of the semiconductor layer in the display area and connected to the first signal line through a contact hole penetrating through the buffer layer and the gate insulating film, and a second electrode of the transistor disposed to overlap the other side of the semiconductor layer in the display area, a first pad disposed on the buffer layer in the pad area and exposed by a pad opening, a first insulating layer disposed on the second conductive layer and the first pad, and a light emitting element disposed on the first insulating layer in the display area, wherein the first pad is formed of the first conductive layer or the second conductive layer.

A display device includes a conductive pattern on a substrate, a via layer on the conductive pattern with a via hole exposing the conductive pattern, a first electrode and a second electrode on the via layer and spaced apart from each other, a first insulating layer on the first electrode and the second electrode, a bank layer on the first insulating layer defining an emission area and a subarea, a light-emitting element on the first insulating layer, and a first connection electrode and a second connection electrode on the first insulating layer and the light-emitting element. The first connection electrode electrically contacts an end of the light-emitting element, and the second connection electrode electrically contacts another end of the light-emitting element. The bank layer includes a bank extension portion extended to the subarea and the bank extension portion overlaps at least a portion of the via hole.

A display device includes a substrate, a light emitting element on the substrate, and including a first end portion and a second end portion that are aligned in a first direction that is substantially parallel to an upper surface of the substrate, a first contact electrode in contact with the first end portion of the light emitting element, a first electrode on the first contact electrode, and electrically connected to the first end portion of the light emitting element through the first contact electrode, and a second electrode electrically connected to the second end portion of the light emitting element.

A display device includes a display area comprising pixels, a fan-out area, a pad area, a display driver, a metal layer disposed on a substrate, a data line, a first voltage line, and a second voltage line extending in a first direction on the metal layer in the display area, a fan-out line electrically connecting the data line to the display driver on the metal layer in the fan-out area, a gate line disposed on the metal layer in the display area and extending in a second direction intersecting the first direction, a source-drain layer disposed on the gate line, and an electrode layer disposed on the source-drain layer. The first voltage line includes a first plate portion disposed on the source-drain layer in the fan-out area, and the second voltage line comprises a second plate portion disposed on the electrode layer in the fan-out area.

A pixel may include first and second electrodes spaced apart from each other along a first direction, first light emitting elements arranged along a second direction in a first area between the first electrode and the second electrode, and including a first end portion adjacent to the first electrode and a second end portion adjacent to the second electrode, a first contact electrode on the first end portions of the first light emitting elements, and including a transparent electrode layer, a second contact electrode on the second end portions of the first light emitting elements, and including a reflective electrode layer, a first bank pattern overlapping a portion of the first electrode beneath the first electrode, and a second bank pattern overlapping a portion of the second electrode beneath the second electrode, wherein the first and second bank patterns are spaced apart from the first area by different distances.

A light-emitting element includes a core comprising a first semiconductor layer, a second semiconductor layer disposed on the first semiconductor layer, and an emissive layer disposed between the first semiconductor layer and the second semiconductor layer, an interlayer dielectric film surrounding a side surface of the core, a first element insulating film surrounding an outer surface of the interlayer dielectric film, and a second element insulating film surrounding an outer surface of the first element insulating film. The interlayer dielectric film includes an oxide insulating material having a dielectric constant of about 10 or more, and the interlayer dielectric film has a thickness of less than or equal to about 5 nm.

A pixel includes an emission area and a non-emission area; first to fourth alignment electrodes spaced apart from each other in the emission area and an area of the non-emission area; an insulating layer disposed on the first to fourth alignment electrodes; first to fourth bridge patterns disposed on the insulating layer in the non-emission area; a bank disposed on the first to fourth bridge patterns in the non-emission area, and including a first opening and a second opening; first and second pixel electrodes disposed in the emission area; and light emitting elements disposed in the emission area, and electrically connected with the first and second pixel electrodes. The first alignment electrode, the first bridge pattern, and the first pixel electrode are electrically connected to each other. The third alignment electrode, the third bridge pattern, and the second pixel electrode are electrically connected to each other.

The display device comprises a first electrode and a second electrode disposed on a first surface of a substrate, the first electrode and the second electrode spaced apart from each other, least one light-emitting element disposed between the first electrode and the second electrode, a functional layer disposed on a second surface of the substrate, and a reflective layer disposed between the functional layer and the second surface of the substrate, the reflective layer overlapping the light-emitting element in a plan view.