A power module is provided. The power module includes a substrate, a power conversion chip that is disposed on the substrate and an insulating film that is formed on a structure in which the power conversion chip is disposed on the substrate. Additionally, the power module includes a metal mold that encases the structure that is coated with the insulating film. Additionally, the power module provides a simplified structure and improved heat dissipation performance compared to conventional power modules.

A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a substrate and a first passive device. The substrate has a first surface and a second surface opposite to the first surface. The first passive device includes a first terminal and a second terminal, wherein the first terminal is closer to the first surface than to the second surface, and the second terminal is closer to the second surface than to the first surface.

A semiconductor package includes a first base plate, first semiconductor structure, second base plate and filling layer. The first base plate has a first surface including first and second signal transmission regions. The first semiconductor structure located on the first surface is electrically connected to the first signal transmission region. The second base plate located on the first base plate includes a base and a first interconnection surface. The first interconnection surface is away from the first surface. The first interconnection surface has first and second interconnection regions communicated with each other. The first interconnection region is electrically connected to the second signal transmission region. The filling layer seals the first semiconductor structure, second base plate and first surface. The first interconnection region is not sealed, and the second interconnection region is. There is a preset height between a top surface of the filling layer and the first interconnection region.

A semiconductor module includes first and second semiconductor chips including first and second main electrodes, respectively; first and second connection terminals electrically connected to the first and second main electrodes, respectively; and an insulating sheet. The first connection terminal includes a first conductor portion including a first peripheral edge and a first terminal portion extending from the first peripheral edge in plan view, and the second connection terminal includes a second conductor portion including a second peripheral edge. A part of the first conductor portion overlap a part of the second conductor portion in plan view. The insulating sheet includes an insulating portion layered between the first and second conductor portions, and a first protruding portion positioned between a tip portion of the first terminal portion and the second peripheral edge in plan view, the first protruding portion forming an angle relative to a surface of the first terminal portion.

A light emitting device including a bulb having a side surface, a board elongated longer in a first direction than in a second direction perpendicular to the first direction, and a plurality of light emitting elements mounted on the board. Each of the plurality of light emitting elements has an upper surface and a lower surface opposite to the upper surface, where the lower surface is mounted on the board. The device includes a plurality of sets of metal plates and leads electrically connected to the plurality of light emitting elements, and a wavelength conversion member covering the light emitting elements and a portion of each of the metal plates. The board, the light emitting elements, the sets of metal plates and leads, and the wavelength conversion member are disposed in the bulb. The upper surface of each of the light emitting elements faces the side surface of the bulb.

Provided is a semiconductor device including: a lead frame having an upper surface provided with a concave portion and a lower surface provided with a convex portion; a semiconductor chip fixed to the upper surface of the lead frame; a solder layer provided in the concave portion and fixing the semiconductor chip to the upper surface of the lead frame; and a sealing resin for sealing the semiconductor chip and the lead frame. A thickness of the solder layer is larger than a depth of the concave portion. The sealing resin covers at least a part of the lower surface of the lead frame. At least a part of the convex portion of the lead frame is exposed from the sealing resin.

A memory device might include a controller configured to cause the memory device to generate a first sum of expected peak current magnitudes for a plurality of memory devices, and generate a second sum of expected peak current magnitudes for a subset of the plurality of memory devices, if the memory device were to initiate a next phase of an access operation in a selected operating mode; to compare the first sum to a first current demand budget for the plurality of the memory devices; to compare the second sum to a second current demand budget for the subset of memory devices; and to initiate the next phase of the access operation in the selected operating mode in response to the first sum being less than or equal to the first current demand budget and the second sum being less than or equal to the second current demand budget.

Provided is a semiconductor device capable of suppressing increase in size of a package and adjusting an amount of negative feedback. A power module as a semiconductor device includes an IGBT which is a switching element and a free wheel diode (FWD) parallelly connected to the switching element. The IGBT has, on a surface thereof, an emitter electrode and a gate electrode of the IGBT and a conductive pattern insulated from the emitter electrode and the gate electrode. The FWD has, on a surface thereof, an anode electrode of the FWD and a conductive pattern insulated from the anode electrode.

A semiconductor device includes: a substrate; a first semiconductor chip; a first adhesive layer; a second semiconductor chip; a second adhesive layer; and a spacer. The substrate has a first surface. The first semiconductor chip is provided above the first surface. The first adhesive layer is provided on a lower surface, which is opposed to the substrate, of the first semiconductor chip and contains a plurality of types of resins different in molecular weight. The second semiconductor chip is provided between the substrate and the first adhesive layer. The second adhesive layer covers surroundings of the second semiconductor chip in a view from a normal direction of a first surface, and contains at least one type of the resin lower in molecular weight than the other resins among the plurality of types of resins contained in the first adhesive layer. The spacer covers surroundings of the second adhesive layer in the view from the normal direction of the first surface.

An electronic package, a semiconductor package structure and a method for manufacturing the same are provided. The electronic package includes a carrier, a first electronic component, an electrical extension structure, and an encapsulant. The carrier has a first face and a second face opposite to the first face. The first electronic component is adjacent to the first face of the carrier. The electrical extension structure is adjacent to the first face of the carrier and defines a space with the carrier for accommodating the first electronic component, the electrical extension structure is configured to connect the carrier with an external electronic component. The encapsulant encapsulates the first electronic component and at least a portion of the electrical extension structure.