Patent classifications
H01L2224/48484
LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME
A light emitting device includes a printed circuit board (PCB) including a connection pad, a base substrate mounted on the PCB and including a pixel region and a pad region, light emitting structures arranged on the pixel region, a barrier rib structure disposed on the pixel region and disposed at a vertical level different from the light emitting structures, the barrier rib structure including barrier ribs connected with each other to define each of pixel spaces, a phosphor layer filling each pixel space, a dam structure surrounding the barrier rib structure, a pad disposed on the pad region and adjacent to at least one side of an outer boundary of the light emitting structures, a bonding wire connecting the connection pad to the pad, and a molding structure covering the pad, the connection pad, the bonding wire, and at least a portion of the dam structure.
Biometric sensing chip and electronic device using same
A biometric sensing chip includes a biometric sensing die including a memory circuit for saving data and an electrostatic conductor set above the memory circuit for discharging static electricity. An electronic device includes the biometric sensing chip described above is also provided.
Light emitting device and method of manufacturing the same
A light emitting device includes a printed circuit board (PCB) including a connection pad, a base substrate mounted on the PCB and including a pixel region and a pad region, light emitting structures arranged on the pixel region, a barrier rib structure disposed on the pixel region and disposed at a vertical level different from the light emitting structures, the barrier rib structure including barrier ribs connected with each other to define each of pixel spaces, a phosphor layer filling each pixel space, a dam structure surrounding the barrier rib structure, a pad disposed on the pad region and adjacent to at least one side of an outer boundary of the light emitting structures, a bonding wire connecting the connection pad to the pad, and a molding structure covering the pad, the connection pad, the bonding wire, and at least a portion of the dam structure.
Stray inductance reduction in packaged semiconductor devices and modules
In a general aspect, an apparatus can include a first substrate operatively coupled with a second substrate. The apparatus can also include a power supply terminal assembly including a first power supply terminal aligned along a first plane, the first power supply terminal being electrically coupled with the first substrate. The power supply terminal assembly can also include a second power supply terminal aligned along a second plane, the second power supply terminal being electrically coupled with the second substrate. The power supply terminal assembly can further include a power supply terminal frame having an isolation portion disposed between the first power supply terminal and the second power supply terminal and a retention portion disposed around a portion of the first power supply terminal and disposed around a portion of the second power supply terminal.
STRAY INDUCTANCE REDUCTION IN PACKAGED SEMICONDUCTOR DEVICES AND MODULES
In a general aspect, an apparatus can include a first substrate operatively coupled with a second substrate. The apparatus can also include a power supply terminal assembly including a first power supply terminal aligned along a first plane, the first power supply terminal being electrically coupled with the first substrate. The power supply terminal assembly can also include a second power supply terminal aligned along a second plane, the second power supply terminal being electrically coupled with the second substrate. The power supply terminal assembly can further include a power supply terminal frame having an isolation portion disposed between the first power supply terminal and the second power supply terminal and a retention portion disposed around a portion of the first power supply terminal and disposed around a portion of the second power supply terminal.
BIOMETRIC SENSING CHIP AND ELECTRONIC DEVICE USING SAME
A biometric sensing chip includes a biometric sensing die including a memory circuit for saving data and an electrostatic conductor set above the memory circuit for discharging static electricity. An electronic device includes the biometric sensing chip described above is also provided.
Multi-layer metal pads
A method for fabricating a semiconductor device includes forming a conductive liner over a first landing pad in a first region and over a second landing pad in a second region. The method further includes depositing a first conductive material within first openings within a resist layer formed over the conductive liner. The first conductive material overfills to form a first pad and a first layer of a second pad. The method further includes depositing a second resist layer over the first conductive material, and patterning the second resist layer to form second openings exposing the first layer of the second pad without exposing the first pad. A second conductive material is deposited over the second layer of the second pad.
Multi-Layer Metal Pads
A method for fabricating a semiconductor device includes forming a conductive liner over a first landing pad in a first region and over a second landing pad in a second region. The method further includes depositing a first conductive material within first openings within a resist layer formed over the conductive liner. The first conductive material overfills to form a first pad and a first layer of a second pad. The method further includes depositing a second resist layer over the first conductive material, and patterning the second resist layer to form second openings exposing the first layer of the second pad without exposing the first pad. A second conductive material is deposited over the second layer of the second pad.
Multi-layer metal pads
A method for fabricating a semiconductor device includes forming a conductive liner over a first landing pad in a first region and over a second landing pad in a second region. The method further includes depositing a first conductive material within first openings within a resist layer formed over the conductive liner. The first conductive material overfills to form a first pad and a first layer of a second pad. The method further includes depositing a second resist layer over the first conductive material, and patterning the second resist layer to form second openings exposing the first layer of the second pad without exposing the first pad. A second conductive material is deposited over the second layer of the second pad.