H01L2224/49052

Liquid detection in a sensor environment and remedial action thereof

A device includes a sensor die, an electrical coupling, a substrate, a liquid detection unit, and a housing unit. The sensor die is coupled to the substrate via the electrical coupling. The liquid detection unit electrically is coupled to the sensor die. The housing unit and the substrate are configured to house the sensor die, the liquid detection unit, and the electrical coupling. The housing unit comprises an opening that exposes the sensor die to an environment external to the housing unit. The liquid detection unit detects presence of liquid within an interior environment of the housing unit. In some embodiments, the device further includes a gel filled within the interior environment of the housing unit covering the sensor die and the substrate. The gel, e.g., silicone, fluoro silicone, etc., is configured to protect the sensor die, the electrical coupling, and the substrate from exposure to the liquid.

LIQUID DETECTION IN A SENSOR ENVIRONMENT AND REMEDIAL ACTION THEREOF

A device includes a housing unit with an internal volume. The device further includes a sensor coupled to a substrate via an electrical coupling, wherein the sensor is disposed within the internal volume of the housing unit, and wherein the sensor is in communication with an external environment of the housing unit from a side other than a side associated with the substrate. The device also includes a moisture detection unit electrically coupled to the sensor, wherein the moisture detection unit comprises at least two looped wires at different heights, and wherein the moisture detection unit is configured to detect presence of a moisture within an interior environment of the housing unit when the moisture detection unit becomes in direct contact with the moisture.

MEMORY SYSTEM
20230090800 · 2023-03-23 · ·

According to one embodiment, a memory system includes: a first package including a first memory chip configured to store data, and a first chip containing a first circuit configured to control an On Die Termination (ODT) operation based on a first signal which is a control signal for reading of data stored in the first memory chip; a second package including a second memory chip configured to store data, and a second chip containing a second circuit configured to control the ODT operation based on the first signal, the first signal also being a control signal for reading of data stored in the second memory chip; and a controller configured to transmit the first signal to the first chip and the second chip.

SEMICONDUCTOR PACKAGE
20230087607 · 2023-03-23 ·

A semiconductor package includes a substrate extending in a first direction and a second direction perpendicular to the first direction, a first semiconductor chip disposed on the substrate, the first semiconductor chip having a stepped portion, a second semiconductor chip disposed on the substrate and horizontally spaced apart from the first semiconductor chip in the first direction, a third semiconductor chip disposed on the second semiconductor chip and a bottom surface of the stepped portion, and an upper adhesive layer disposed between the second semiconductor chip and the third semiconductor chip, the upper adhesive layer contacting a portion of the bottom surface of the stepped portion.

PACKAGE FOR SEVERAL INTEGRATED CIRCUITS

A package for integrated circuits includes a base substrate having a mounting face. A first electronic chip has a top face electrically connected to the mounting face and a bottom face mounted to the mounting face by an adhesive layer. A second electronic chip has a bottom face covered with a thermal interface layer and a top face electrically connected to the mounting face. A heat sink includes a first part embedded in the adhesive layer, a second part having a bottom face in contact with the layer of thermal interface material and a top face, and a connection part between the first part and the second part. A coating encapsulates the first and second electronic chips and the heat sink. The top face of the second part of the heat sink exposed from the encapsulating coating.

LEADFRAME WITH GROUND PAD CANTILEVER

An electronic device includes a die attach pad with a set of cantilevered first leads for down bond connections, a set of second leads spaced apart from the die attach pad, a semiconductor die mounted to the die attach pad and enclosed by a package structure, a set of first bond wires connected between respective bond pads of the semiconductor die and at least some of the first leads, and a set of second bond wires connected between respective further bond pads of the semiconductor die and at least some of the second leads.

Radio-frequency module and communication device

A radio-frequency module includes: a transmitting circuit disposed on a mounting substrate to process a radio-frequency signal input from a transmission terminal and to output a resultant signal to a common terminal; a receiving circuit disposed on the mounting substrate to process a radio-frequency signal input from the common terminal and to output a resultant signal to a reception terminal; a first inductor included in a first transmitting circuit; and a bonding wire connected to the ground and bridging over the first inductor.

Current concentration-suppressed electronic circuit, and semiconductor module and semiconductor apparatus containing the same
11631668 · 2023-04-18 · ·

An electronic circuit having a first terminal and a second terminal. The electronic circuit includes a plurality of diodes connected in parallel, the plurality of diodes including a first diode and a second diode that respectively have applied thereto a first forward voltage and a second forward voltage, the second forward voltage being higher than the first forward voltage. A first path and a second path are formed from the first terminal, respectively via the first diode and the second diode, to the second terminal. An inductance of the first path is larger than an inductance of the second path.

Semiconductor package having a redistribution layer for package-on-package structure

A semiconductor package includes: a frame having a cavity and including a wiring structure connecting first and second surfaces of the frame; a first connection structure on the first surface of the frame and including a first redistribution layer connected to the wiring structure; a first semiconductor chip on the first connection structure within the cavity; an encapsulant encapsulating the first semiconductor chip and covering the second surface of the frame; a second connection structure including a second redistribution layer including a first redistribution pattern and first connection vias; and a second semiconductor chip disposed on the second connection structure and having connection pads connected to the second redistribution layer.

CONNECTING STRIP FOR DISCRETE AND POWER ELECTRONIC DEVICES
20220320032 · 2022-10-06 · ·

A connecting strip of conductive elastic material having an arched shape having a concave side and a convex side. The connecting strip is fixed at the ends to a support carrying a die with the convex side facing the support. During bonding, the connecting strip undergoes elastic deformation and presses against the die, thus electrically connecting the at least one die to the support.