The present invention provides a light emitting element capable or realizing at least one of lower resistance, higher output, higher power efficiency (1 m/W), higher mass productivity and lower cost of the element using a light transmissive electrode for an electrode arranged exterior to the light emitting structure. A semiconductor light emitting element includes a light emitting section, a first electrode and a second electrode on a semiconductor structure including first and second conductive type semiconductor layers, the first and the second electrodes respectively including at least two layers of a first layer of a light transmissive conductive film conducting to the first and the second conductive type semiconductor and a second layer arranged so as to conduct with the first layer. First and second light transmissive insulating films are respectively arranged so as to overlap at least one part of the first and the second layers.

There is a problem that an area of a principal current cell is reduced by an area of a bonding pad wiring layer for a sub-cell. A source electrode 9b of a current detection cell 22 is electrically connected to a bonding pad wiring layer 12 formed on an interlayer insulating film 10 via a wiring layer contact 11. The bonding pad wiring layer 12 is formed with respect to a source electrode 9a of a principal current cell 21 so as to cover a part of the source electrode 9a via the interlayer insulating film 10. As a result, the source electrode 9b is miniaturized, and a size of the source electrode 9b is made substantially equal to a size of the current detection cell 22. Therefore, the current detection cell 22 and the principal current cell 21 are disposed close to each other.

A semiconductor device includes: a supporting member having a wiring including a die-pad; a semiconductor element bonded to the die-pad; a wire bonded to the wiring and the semiconductor element; and a bonding layer that has a conductivity and bonds the die-pad and the semiconductor element. When viewed in a thickness direction of the semiconductor element, the die-pad includes a first region included inside a peripheral edge of the semiconductor element and a second region that is connected to the first region and extends farther then the peripheral edge of the semiconductor element. When viewed in the thickness direction, the wire is separated from the second region.

An LED module according to the present invention includes an LED unit 2 and a case 1, where the LED unit includes an LED chip 21, and the case 1 includes a main body 11 made of a ceramic material and a pad 12a on which the LED unit 2 is mounted. The outer edge 121a of the pad 12a is positioned inward of the outer edge 2a of the LED unit 2 as viewed in plan. These arrangements prevent the light emission amount of the LED module A1 from reducing with time.

Provided are a light source circuit unit that improves light extraction efficiency, as well as an illuminator and a display that include such a light source circuit unit. The light source circuit unit includes: a circuit substrate having a wiring pattern on a surface thereof, the wiring pattern having light reflectivity, a circular pedestal provided on the circuit substrate, a water-repelling region provided at least from a peripheral edge portion of the pedestal to a part of a side face of the pedestal, and one or two or more light-emitting device chips mounted on the pedestal, and driven by a current that flows through the wiring pattern.

Memory devices and associated methods and systems are disclosed herein. A representative memory device includes a substrate and a memory controller electrically coupled to the substrate. The memory controller can include a first in/out (I/O) channel and a second I/O channel. The memory device can further include a plurality of first memories and second memories coupled to the substrate and arranged in a stack in which the first memories are interleaved between the second memories. The memory device can further include (i) a plurality of first wire bonds electrically coupling the first memories to the first I/O channel of the memory controller and (ii) a plurality of second wire bonds electrically coupling the second memories to the second I/O channel.

Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises a package substrate, a redistribution layer on the package substrate, a vertical connection terminals that connects the package substrate to the redistribution layer, a first semiconductor chip between the package substrate and the redistribution layer, a first molding layer that fills a space between the package substrate and the redistribution layer, a second semiconductor chip on the redistribution layer, a third semiconductor chip on the second semiconductor chip, a first connection wire that directly and vertically connects the redistribution layer to a first chip pad of the third semiconductor chip, the first chip pad is beside the second semiconductor chip and on a bottom surface of the third semiconductor chip, and a second molding layer on the redistribution layer and covering the second semiconductor chip and the third semiconductor chip.

Semiconductor devices having multiple substrates and die stacks, and associated systems and methods, are disclosed herein. In some embodiments, a semiconductor device includes a package substrate, and a first die stack mounted on the package substrate and including a plurality of first memory dies. The device can include a substrate mounted on the first die stack, the substrate including a plurality of routing elements. The device can also include a second die stack mounted on the substrate, the second die stack including a plurality of second memory dies. The device can further include a controller die mounted on the substrate. The controller die can be configured to communicate with the second die stack via the routing elements of the substrate. The device can include a mold material encapsulating the first die stack, the second die stack, the substrate, and the controller die.

A semiconductor package may include a semiconductor chip on a package substrate. The semiconductor package may include a plurality of conductive connections connecting the semiconductor chip to the package substrate may be disposed, a plurality of towers which are apart from one another and each include a plurality of memory chips may be disposed, wherein a lowermost memory chip of each of the plurality of towers overlaps the semiconductor chip from a top-down view. The semiconductor package further includes a plurality of adhesive layers be attached between the lowermost memory chip of each of the plurality of towers and the semiconductor chip.

A semiconductor device assembly including a substrate, a surface-mount device (SMD) electrical component attached to the substrate is provided. The SMD electrical component includes a first contact and a second contact, and at least a first wire bond electrically and physically coupled directly to the first contact.