Microelectronic devices and methods for manufacturing such devices are disclosed herein. In one embodiment, a packaged microelectronic device can include an interposer substrate with a plurality of interposer contacts. A microelectronic die is attached and electrically coupled to the interposer substrate. The device further includes a casing covering the die and at least a portion of the interposer substrate. A plurality of electrically conductive through-casing interconnects are in contact with and projecting from corresponding interposer contacts at a first side of the interposer substrate. The through-casing interconnects extend through the thickness of the casing to a terminus at the top of the casing. The through-casing interconnects comprise a plurality of filaments attached to and projecting away from the interposer contacts in a direction generally normal to the first side of the interposer substrate.

The present application provides a semiconductor module and a power conversion device wherein wiring inductance is reduced. The semiconductor module is characterized by including a semiconductor element, a first terminal on which the semiconductor element is mounted, a second terminal disposed in a periphery of the semiconductor element and having a multiple of wiring portions, and a multiple of connection lines extending in multiple directions from an upper face of the semiconductor element and connected to each of the multiple of wiring portions of the second terminal, wherein a free region is provided among the multiple of wiring portions, and the multiple of connection lines and the multiple of wiring portions forming current paths with each of the multiple of connection lines are of the same potential.

The semiconductor device includes a semiconductor element, a first lead, and a second lead. The semiconductor element has an element obverse surface and an element reverse surface spaced apart from each other in a thickness direction. The semiconductor element includes an electron transit layer disposed between the element obverse surface and the element reverse surface and formed of a nitride semiconductor, a first electrode disposed on the element obverse surface, and a second electrode disposed on the element reverse surface and electrically connected to the first electrode. The semiconductor element is mounted on the first lead, and the second electrode is joined to the first lead. The second lead is electrically connected to the first electrode. The semiconductor element is a transistor. The second lead is spaced apart from the first lead and is configured such that a main current to be subjected to switching flows therethrough.

A semiconductor package includes; a package substrate including an upper surface with a bonding pad, a lower semiconductor chip disposed on the upper surface of the package substrate, wherein an upper surface of the lower semiconductor chip includes a connect edge region including a connection pad and an open edge region including a dam structure including dummy bumps, a bonding wire having a first height above the upper surface of the lower semiconductor chip and connecting the bonding pad and the connection pad, an upper semiconductor chip disposed on the upper surface of the lower semiconductor chip using an inter-chip bonding layer, and a molding portion on the package substrate and substantially surrounding the lower semiconductor chip and the upper semiconductor chip.

To provide a circuit module capable of suppressing a decrease in an area for mounting an electronic component on a substrate even when a wire for shielding the electronic component is connected to the substrate. A circuit module according to the present disclosure includes a substrate, a first component mounted on the substrate and including a ground terminal on an upper surface, first wires that connect the ground terminal to the substrate, and a second component mounted on the substrate, in which overlapping first wires in plan view.

In a RC-IGBT chip, an anode electrode film and an emitter electrode film are arranged with a distance therebetween. The anode electrode film and the emitter electrode film are electrically connected by a wiring conductor having an external impedance and an external impedance. The external impedance and the external impedance include the resistance of the wiring conductor and the inductance of the wiring conductor.

In a RC-IGBT chip, an anode electrode film and an emitter electrode film are arranged with a distance therebetween. The anode electrode film and the emitter electrode film are electrically connected by a wiring conductor having an external impedance and an external impedance. The external impedance and the external impedance include the resistance of the wiring conductor and the inductance of the wiring conductor.

A semiconductor package includes a lower semiconductor die and an upper semiconductor die which are stacked with an offset in a first direction, wherein the lower semiconductor die includes a plurality of lower pads arranged in a second direction, which is perpendicular to the first direction, and wherein the upper semiconductor die includes a plurality of upper pads arranged in the second direction. The semiconductor package also includes bent wires electrically connecting the lower pads of the lower semiconductor die with the upper pads of the upper semiconductor die in the first direction. The semiconductor package further includes vertical wires such that a vertical wire is disposed on any one of the lower pad and the upper pad for each pair of pads electrically connected by a bent wire.

A semiconductor device is provided, which includes a semiconductor chip; a first current input/output portion that is electrically connected to the semiconductor chip; a second current input/output portion that is electrically connected to the semiconductor chip; three or more conducting portions provided with the semiconductor chip, between the first current input/output portion and the second current input/output portion; and a current path portion having a path through which current is conducted to each of the three or more conducting portions, wherein the current path portion includes a plurality of slits.

A semiconductor device is provided, which includes a semiconductor chip; a first current input/output portion that is electrically connected to the semiconductor chip; a second current input/output portion that is electrically connected to the semiconductor chip; three or more conducting portions provided with the semiconductor chip, between the first current input/output portion and the second current input/output portion; and a current path portion having a path through which current is conducted to each of the three or more conducting portions, wherein the current path portion includes a plurality of slits.