A semiconductor package comprising a substrate including substrate pads on a top surface thereof, a first upper semiconductor chip on the substrate and including conductive chip pads, and bonding wires coupled to the substrate pads and the first upper semiconductor chip. The bonding wires include first and second bonding wires. The substrate has a first region between the conductive chip pads and the substrate pads, and a second region between the first region and the substrate pads. The second bonding wire has a maximum vertical level on the first region of the substrate. On the first region of the substrate, the first bonding wire is at a level higher than that of the second bonding wire. On the second region of the substrate, the second bonding wire is at a level higher than that of the first bonding wire.

An apparatus relating generally to a substrate is disclosed. In such an apparatus, a first bond via array has first wires extending from a surface of the substrate. A second bond via array has second wires extending from the surface of the substrate. The first bond via array is disposed at least partially within the second bond via array. The first wires of the first bond via array are of a first height. The second wires of the second bond via array are of a second height greater than the first height for coupling of at least one die to the first bond via array at least partially disposed within the second bond via array.

A semiconductor device includes a first terminal, a second terminal, and a plurality of third terminals on a substrate. Memory chips are stacked on the substrate in an offset manner. Each memory chip has first pads, second pads, and third pads thereon. A first bonding wire is electrically connected to the first terminal and physically connected to a first pad of each memory chip. A second bonding wire is electrically connected to the second terminal and physically connected to a second pad of each memory chip. A third bonding wire electrically connects one third terminal to a third pad on each memory chip. A fourth bonding wire is connected to the first bonding wire at a first pad on a first memory chip of the stack and another first pad on the first memory chip. The fourth bonding wire straddles over the second bonding wire and the third bonding wire.

A packaged semiconductor device includes a first bond pad, a second bond pad, a first bond wire that includes a first end bonded to the first bond pad and a second end bonded to the second bond pad, and a second bond wire that includes a first end that is electrically connected to the first bond pad and a second end that is electrically connected to the second bond pad. The first end of the second bond wire is bonded to the first end of the first bond wire. A method of bonding a bond wire includes bonding a first end of a first bond wire to a contact surface of a first bond pad and bonding a first end of a second bond wire to a surface of the first end of the first bond wire.

A semiconductor device includes a first terminal, a second terminal, and a plurality of third terminals on a substrate. Memory chips are stacked on the substrate in an offset manner. Each memory chip has first pads, second pads, and third pads thereon. A first bonding wire is electrically connected to the first terminal and physically connected to a first pad of each memory chip. A second bonding wire is electrically connected to the second terminal and physically connected to a second pad of each memory chip. A third bonding wire electrically connects one third terminal to a third pad on each memory chip. A fourth bonding wire is connected to the first bonding wire at a first pad on a first memory chip of the stack and another first pad on the first memory chip. The fourth bonding wire straddles over the second bonding wire and the third bonding wire.

A packaged semiconductor device includes a first bond pad, a second bond pad, a first bond wire that includes a first end bonded to the first bond pad and a second end bonded to the second bond pad, and a second bond wire that includes a first end that is electrically connected to the first bond pad and a second end that is electrically connected to the second bond pad. The first end of the second bond wire is bonded to the first end of the first bond wire. A method of bonding a bond wire includes bonding a first end of a first bond wire to a contact surface of a first bond pad and bonding a first end of a second bond wire to a surface of the first end of the first bond wire.

A semiconductor package comprising a substrate including substrate pads on a top surface thereof, a first upper semiconductor chip on the substrate and including conductive chip pads, and bonding wires coupled to the substrate pads and the first upper semiconductor chip. The bonding wires include first and second bonding wires. The substrate has a first region between the conductive chip pads and the substrate pads, and a second region between the first region and the substrate pads. The second bonding wire has a maximum vertical level on the first region of the substrate. On the first region of the substrate, the first bonding wire is at a level higher than that of the second bonding wire. On the second region of the substrate, the second bonding wire is at a level higher than that of the first bonding wire.