A semiconductor device includes a semiconductor chip having a device forming surface on which a device structure is formed, a first conductive layer formed on the device forming surface of the semiconductor chip, a second conductive layer formed on the first conductive layer, a first wire that is connected to the second conductive layer and that is made of a material composed mainly of copper, and a third conductive layer that is formed between the first conductive layer and the second conductive layer and that includes a material harder than copper.

An object is to provide a technique capable of improving the power efficiency of a semiconductor device. The semiconductor device includes first to sixth parallel connection bodies, each including a semiconductor switching element and a diode connected in antiparallel to the semiconductor switching element. At least one of the voltage drops of the second parallel connection body and the third parallel connection body is smaller than a voltage drop of at least one of the first parallel connection body, the fourth parallel connection body, the fifth parallel connection body, and the sixth parallel connection body.

An electronic device includes a die attach pad with a set of cantilevered first leads for down bond connections, a set of second leads spaced apart from the die attach pad, a semiconductor die mounted to the die attach pad and enclosed by a package structure, a set of first bond wires connected between respective bond pads of the semiconductor die and at least some of the first leads, and a set of second bond wires connected between respective further bond pads of the semiconductor die and at least some of the second leads.

A method for manufacturing a light emitting device includes: preparing a first substrate having an upper surface comprising an element placement region; placing a light emitting element in the element placement region; disposing an uncured, sheet-like light-transmissive member on the light emitting element and bringing an outer edge of a lower surface of the light-transmissive member into contact with an outer upper surface of the element placement region of the first substrate by pressing the light-transmissive member; and disposing a first protrusion portion along an outer edge of an upper surface of the light-transmissive member so that the first protrusion portion extends over the upper surface of the first substrate and the upper surface of the light-transmissive member.

A semiconductor device, including an insulated circuit substrate that has a base plate, a resin layer disposed on a front surface of the base plate, and a circuit pattern disposed on a front surface of the resin layer; and a semiconductor chip that is rectangular in a plan view of the semiconductor device and is bonded to a front surface of the circuit pattern in such a manner that a side edge of the semiconductor chip is spaced inwardly from an outer peripheral edge of the circuit pattern by at least a predetermined distance. Both the predetermined distance and a thickness of the circuit pattern are greater than or equal to 0.1 of a length of one side of the semiconductor chip.

A semiconductor device of embodiments includes: a die pad including a first region and a second region surrounding the first region and thinner than the first region; a semiconductor chip including an upper electrode, a lower electrode, and a silicon carbide layer between the upper electrode and the lower electrode and provided on an inner side rather than the second region on a surface of the die pad; and a connection layer for connecting the lower electrode to the surface.

An electronic apparatus comprises a semiconductor device and a mounting substrate. The semiconductor device includes a semiconductor chip and a wiring circuit board. The chip includes a circuit blocks and first electrode pads. The wiring circuit board includes a first surface and a second surface. The first surface includes second electrode pads wirings. The second surface includes ball electrodes. A first wiring supplies a ground potential to a first circuit block. A second wiring supplies a ground potential to a second circuit block. The second surface includes a first extension pad and a second extension pad. The first extension pad and the second extension pad are disposed at positions at which they are connected to each other on the second surface side through a single ball electrode.

An electronic device includes a die attach pad with a set of cantilevered first leads for down bond connections, a set of second leads spaced apart from the die attach pad, a semiconductor die mounted to the die attach pad and enclosed by a package structure, a set of first bond wires connected between respective bond pads of the semiconductor die and at least some of the first leads, and a set of second bond wires connected between respective further bond pads of the semiconductor die and at least some of the second leads.

A semiconductor power module including an insulating substrate having one surface and another surface, an output side terminal arranged at a one surface side of the insulating substrate, a first power supply terminal arranged at the one surface side of the insulating substrate, a second power supply terminal to which a voltage of a magnitude different from a voltage applied to the first power supply terminal is to be applied, and arranged at another surface side of the insulating substrate so as to face the first power supply terminal across the insulating substrate, a first switching device arranged at the one surface side of the insulating substrate and electrically connected to the output side terminal and the first power supply terminal, and a second switching device arranged at the one surface side of the insulating substrate and electrically connected to the output side terminal and the second power supply terminal.

A semiconductor package is configured to include a package substrate, a semiconductor chip disposed on the package substrate, and bonding wires. The package substrate includes a first column of bond fingers disposed in a first layer and a second column of bond fingers disposed in a second layer. The semiconductor chip includes a first column of chip pads arrayed in a first column and a second column of chip pads arrayed in a second column adjacent to the first column. The first column of chip pads are connected to the first column of bond fingers, respectively, through first bonding wires, and the second column of chip pads are connected to the second column of bond fingers, respectively, through second bonding wires.