Patent classifications
H01L2224/81204
Method for manufacturing semiconductor package
The present disclosure relates to a method for manufacturing a semiconductor package including vacuum-laminating a non-conductive film on a substrate on which a plurality of through silicon vias are provided and bump electrodes are formed, and then performing UV irradiation, wherein an increase in melt viscosity before and after UV irradiation can be adjusted to 30% or less, whereby a bonding can be performed without voids during thermo-compression bonding, and resin-insertion phenomenon between solders can be prevented, fillets can be minimized and reliability can be improved.
MANUFACTURING APPARATUS AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
A manufacturing apparatus of a semiconductor device includes: a stage; a bonding head, including a mounting tool, a tool heater, and a lifting and lowering mechanism; and a controller performing bonding processing. The controller performs, in the bonding processing: first processing in which, after a chip is brought into contact with a substrate, as heating of the chip is started, the chip is pressurized against the substrate; distortion elimination processing in which, after the first processing and before melting of a bump, the lifting and lowering mechanism is driven in a lifting direction, thereby eliminating distortion of the bonding head; and second processing in which, after the distortion elimination processing, position control is performed on the lifting and lowering mechanism so as to cancel thermal expansion and contraction of the bonding head, thereby maintaining a gap amount at a specified target value.
METHOD FOR USING A BUFFER SHEET
The present invention provides a buffer sheet composition including a thermosetting compound, which buffer sheet composition is used for producing a buffer sheet to be interposed between a heating member and an electronic component, when the electronic component is heated by the heating member so as to mount the electronic component on a substrate, as well as a buffer sheet including a thermosetting composition layer obtained by forming the buffer sheet composition into the form of a sheet.
DEFORMABLE SEMICONDUCTOR DEVICE CONNECTION
A semiconductor device may include a first plate-like element having a first substantially planar connection surface with a first connection pad and a second plate-like element having a second substantially planar connection surface with a second connection pad corresponding to the first connection pad. The device may also include a connection electrically and physically coupling the first and second plate-like elements and arranged between the first and second connection pads. The connection may include a deformed elongate element arranged on the first connection pad and extending toward the second connection pad and solder in contact with the second connection pad and the elongate element.
Semiconductor device manufacturing method
According to an embodiment, a temperature of an inside of a furnace is set to fall within a range of a reduction temperature or more of a carboxylic acid and less than a melting temperature of a solder bump, and the inside is concurrently set to have a first carboxylic acid gas concentration. Thereafter, the temperature of the inside is raised up to the melting temperature, and the inside is concurrently set to have a second carboxylic acid gas concentration. The second carboxylic acid gas concentration is lower than the first carboxylic acid gas concentration, and is a concentration containing a minimum amount of carboxylic acid gas defined to achieve reduction on an oxide film of the solder bump. The inside has the second carboxylic acid gas concentration at least at a time when the temperature of the inside reaches the melting temperature.
Partial laser liftoff process during die transfer and structures formed by the same
A transfer method includes providing a first light emitting diode on a first substrate, performing a partial laser liftoff of the first light emitting diode from the first substrate, laser bonding the first light emitting diode to the backplane after performing the partial laser liftoff, and separating the first substrate from the first light emitting diode after the laser bonding.
MOUNTING APPARATUS
This mounting apparatus is provided with: a plurality of bonding stations each comprising a bonding apparatus for bonding a semiconductor chip onto a substrate wafer, and a chip supply apparatus for supplying the semiconductor chip to the bonding apparatus; and a single wafer transfer apparatus which transfers the substrate wafer in order to supply the substrate wafer to each of the plurality of bonding stations and to collect the substrate wafer from each of the plurality of bonding stations.
ADHESIVE COMPOSITION, SEMICONDUCTOR DEVICE CONTAINING CURED PRODUCT THEREOF, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE USING SAME
The purpose of the present invention is to provide an adhesive composition which allows an alignment mark to be recognized, ensures sufficient solder wettability of a joining section, and is excellent in suppression of void generation. The adhesive composition includes: a high-molecular compound (A); an epoxy compound (B) having a weight average molecular weight of 100 or more and 3,000 or less; and a flux (C); and inorganic particles (D) which have on the surfaces thereof an alkoxysilane having a phenyl group and which have an average, particle diameter of 30 to 200 nm, the flux (C) containing an acid-modified rosin.
Underfill material and method for manufacturing semiconductor device using the same
An underfill film material and a method for manufacturing a semiconductor device using the same which enables voidless mounting and favorable solder bonding properties are provided. An underfill material is used which contains an epoxy resin, an acid anhydride, an acrylic resin and an organic peroxide, the underfill material exhibits non-Bingham fluidity at a temperature ranging from 60° C. to 100° C., a storage modulus G′ measured by dynamic viscosity measurement has an inflection point in an angular frequency region below 10E+02 rad/s, and the storage modulus G′ in the angular frequency below the inflection point is 10E+05 Pa or more and 10E+06 Pa or less. This enables voidless packaging and excellent solder connection properties.
Flip chip alignment mark exposing method enabling wafer level underfill
Alignment marks on a semiconductor device surface are exposed and exposed surfaces cleaned after an obscuring coating is applied over the surface and marks. The surface can be an attachment surface of the device and can include C4 solder bumps of a flip-chip type device and the coating can include a wafer level underfill coating that is substantially optically opaque. Laser ablation, such as with a UV laser, can remove the coating while minimizing heat transfer to the device.