H01L2224/81493

SEMICONDUCTOR DEVICE WITH ENHANCED THERMAL DISSIPATION AND METHOD FOR MAKING THE SAME

A method includes forming a solder layer on a surface of one or more chips. A lid is positioned over the solder layer on each of the one or more chips. Heat and pressure are applied to melt the solder layer and attach each lid to a corresponding solder layer. The solder layer has a thermal conductivity of ≥50 W/mK.

SEMICONDUCTOR DEVICE WITH ENHANCED THERMAL DISSIPATION AND METHOD FOR MAKING THE SAME

A method includes forming a solder layer on a surface of one or more chips. A lid is positioned over the solder layer on each of the one or more chips. Heat and pressure are applied to melt the solder layer and attach each lid to a corresponding solder layer. The solder layer has a thermal conductivity of ≥50 W/mK.

Chip package structure and method of forming the same

A package structure and a method of forming the same are provided. The package structure includes a package substrate and an interposer substrate over the package substrate. The interposer substrate has a first surface facing the package substrate and a second surface opposite the first surface. A first semiconductor device is disposed on the first surface, and a second semiconductor device is disposed on the second surface. Conductive structures are disposed between the interposer substrate and the package substrate. The first semiconductor device is located between the conductive structures. A first side of the first semiconductor device is at a first distance from the most adjacent conductive structure, and a second side of the first semiconductor device is at a second distance from the most adjacent conductive structure. The first side is opposite the second side, and the first distance is greater than the second distance.

Semiconductor device with enhanced thermal dissipation and method for making the same

A method includes forming a solder layer on a surface of one or more chips. A lid is positioned over the solder layer on each of the one or more chips. Heat and pressure are applied to melt the solder layer and attach each lid to a corresponding solder layer. The solder layer has a thermal conductivity of ≥50 W/mK.

Semiconductor device with enhanced thermal dissipation and method for making the same

A method includes forming a solder layer on a surface of one or more chips. A lid is positioned over the solder layer on each of the one or more chips. Heat and pressure are applied to melt the solder layer and attach each lid to a corresponding solder layer. The solder layer has a thermal conductivity of ≥50 W/mK.

High-speed RFID tag assembly using impulse heating

RFID inlays or straps may be assembled using impulse heating of metal precursors. Metal precursors are applied to and/or included in contacts on an RFID IC and/or terminals on a substrate. During assembly of the tag, the IC is disposed onto the substrate such that the IC contacts physically contact either the substrate terminals or metal precursors that in turn physically contact the substrate terminals. Impulse heating is then used to rapidly apply heat to the metal precursors, processing them into metallic structures that electrically couple the IC contacts to the substrate terminals.

Chip package structure with conductive adhesive layer

A chip package structure is provided. The chip package structure includes a wiring substrate including a substrate, a first pad, and a second pad. The first pad and the second pad are respectively over a first surface and a second surface of the substrate, and the first pad is narrower than the second pad. The chip package structure includes a conductive adhesive layer over the first pad. The conductive adhesive layer is in direct contact with the first pad. The chip package structure includes a nickel layer over the conductive adhesive layer. The chip package structure includes a chip over the wiring substrate. The chip package structure includes a conductive bump between the nickel layer and the chip. The conductive bump includes gold.

High-speed RFID tag assembly using impulse heating

RFID inlays or straps may be assembled using impulse heating of metal precursors. Metal precursors are applied to and/or included in contacts on an RFID IC and/or terminals on a substrate. During assembly of the tag, the IC is disposed onto the substrate such that the IC contacts physically contact either the substrate terminals or metal precursors that in turn physically contact the substrate terminals. Impulse heating is then used to rapidly apply heat to the metal precursors, processing them into metallic structures that electrically couple the IC contacts to the substrate terminals.

CHIP PACKAGE STRUCTURE WITH NICKEL LAYER
20230335411 · 2023-10-19 ·

A chip package structure is provided. The chip package structure includes a wiring substrate including a substrate, a first pad, and a second pad. The first pad and the second pad are respectively over a first surface and a second surface of the substrate, and the first pad is narrower than the second pad. The chip package structure includes a nickel layer over the first pad. The nickel layer has a T-shape in a cross-sectional view of the nickel layer. The chip package structure includes a chip over the wiring substrate. The chip package structure includes a conductive bump between the nickel layer and the chip.

CHIP PACKAGE STRUCTURE WITH CONDUCTIVE ADHESIVE LAYER
20220238352 · 2022-07-28 ·

A chip package structure is provided. The chip package structure includes a wiring substrate including a substrate, a first pad, and a second pad. The first pad and the second pad are respectively over a first surface and a second surface of the substrate, and the first pad is narrower than the second pad. The chip package structure includes a conductive adhesive layer over the first pad. The conductive adhesive layer is in direct contact with the first pad. The chip package structure includes a nickel layer over the conductive adhesive layer. The chip package structure includes a chip over the wiring substrate. The chip package structure includes a conductive bump between the nickel layer and the chip. The conductive bump includes gold.