A multilayer composite bonding material for transient liquid phase bonding a semiconductor device to a metal substrate includes thermal stress compensation layers sandwiched between a pair of bonding layers. The thermal stress compensation layers may include a core layer with a first stiffness sandwiched between a pair of outer layers with a second stiffness that is different than the first stiffness such that a graded stiffness extends across a thickness of the thermal stress compensation layers. The thermal stress compensation layers have a melting point above a sintering temperature and the bonding layers have a melting point below the sintering temperature. The graded stiffness across the thickness of the thermal stress compensation layers compensates for thermal contraction mismatch between the semiconductor device and the metal substrate during cooling from the sintering temperature to ambient temperature.

A package structure is disclosed. The package structure includes a substrate including a conductive element and a plurality of wires having a surface area through which heat of the conductive element can be dissipated, lowering a bonding temperature of the conductive element. The package structure also includes a conductive layer disposed between the conductive element of the substrate and the plurality of wires. The conductive contact layer attaches the plurality of wires over the conductive element.

A method for binding a micro device to a substrate is provided. The method includes: locally showering a gas on a portion of the substrate, wherein the gas has a water vapor pressure higher than an ambient water vapor pressure; and placing the micro device over the portion of the substrate after a part of water in the gas is condensed to form a liquid layer on the portion of the substrate and contacting the micro device with the liquid layer, so that the micro device is gripped by a capillary force produced by the liquid layer and is substantially held in a position within a controllable region on the substrate.

A method of manufacturing a semiconductor device includes a transfer molding step and a mold package mounting step. The mold package mounting step includes steps of disposing a semiconductor module on an upper surface of a metal base plate with a second bonding member therebetween, heating the metal base plate, the second bonding member, and the semiconductor module to melt the second bonding member, and then cooling the metal base plate, the second bonding member, and the semiconductor module to cure the second bonding member. During the cooling of the metal base plate, the second bonding member, and the semiconductor module, a difference between an upper surface temperature of the metal base plate and a lower surface temperature of a first metal plate at a solid phase line of the second bonding member is 5? C. or less.

A mount structure includes two members that are bonded to each other with a bonding material layer having a first interface layer and a second interface layer at the interfaces with the two members. The bonding material layer contains a first intermetallic compound and a stress relaxation material. The first intermetallic compound has a spherical, a columnar, or an oval spherical shape, and the same crystalline structure as the first interface layer and the second interface layer, and partly closes the space between the first interface layer and the second interface layer. The stress relaxation material contains tin as a main component, and fills around the first intermetallic compound.

A multilayer composite bonding material for transient liquid phase bonding a semiconductor device to a metal substrate includes thermal stress compensation layers sandwiched between a pair of bonding layers. The thermal stress compensation layers may include a core layer with a first stiffness sandwiched between a pair of outer layers with a second stiffness that is different than the first stiffness such that a graded stiffness extends across a thickness of the thermal stress compensation layers. The thermal stress compensation layers have a melting point above a sintering temperature and the bonding layers have a melting point below the sintering temperature. The graded stiffness across the thickness of the thermal stress compensation layers compensates for thermal contraction mismatch between the semiconductor device and the metal substrate during cooling from the sintering temperature to ambient temperature.

The present invention discloses a vacuum reacting force soldering method, comprising the following steps: die-bonding a chip onto a substrate through soldering to form a semi-finished product; placing the semi-finished product into a vacuum eutectic cavity (6) of a vacuum eutectic stove; vacuum-pumping the vacuum eutectic cavity; preheating the vacuum eutectic cavity to slowly increase the temperature; heating the vacuum eutectic cavity quickly to melt the solder; applying an acting force to the vacuum eutectic cavity to accelerate a rise of the vacuum eutectic cavity after the vacuum eutectic cavity descends; performing forced refrigeration to the exterior of the vacuum eutectic cavity, while introducing a protective gas to the interior thereof; releasing the vacuum state of the vacuum eutectic cavity after the solder is solidified. This invention also discloses a soldering device using the vacuum reacting force eutectic soldering method described herein.

A mount structure includes two members that are bonded to each other with a bonding material layer having a first interface layer and a second interface layer at the interfaces with the two members. The bonding material layer contains a first intermetallic compound and a stress relaxation material. The first intermetallic compound has a spherical, a columnar, or an oval spherical shape, and the same crystalline structure as the first interface layer and the second interface layer, and partly closes the space between the first interface layer and the second interface layer. The stress relaxation material contains tin as a main component, and fills around the first intermetallic compound.

The present invention discloses a vacuum reacting force welding method, comprising the following steps: die-bonding a chip onto a substrate through soldering to form a semi-finished product; placing the semi-finished product into a vacuum eutectic cavity (6) of a vacuum eutectic stove; vacuum-pumping the vacuum eutectic cavity; preheating the vacuum eutectic cavity to slowly increase the temperature; heating the vacuum eutectic cavity quickly to melt the solder; applying an acting force to the vacuum eutectic cavity to accelerate a rise of the vacuum eutectic cavity after the vacuum eutectic cavity descends; performing forced refrigeration to the exterior of the vacuum eutectic cavity, while introducing a protective gas to the interior thereof; releasing the vacuum state of the vacuum eutectic cavity after the solder is solidified. This invention also discloses a welding device using the vacuum reacting force eutectic welding method described herein.

A package structure is disclosed. The package structure includes a substrate including a conductive element and a plurality of wires having a surface area through which heat of the conductive element can be dissipated, lowering a bonding temperature of the conductive element. The package structure also includes a conductive layer disposed between the conductive element of the substrate and the plurality of wires. The conductive contact layer attaches the plurality of wires over the conductive element.