A multi-clip structure includes a first clip for die bonding and a second clip for die bonding. The multi-clip structure further includes a retaining tape fixed to the first clip and to the second clip to hold the first clip and the second clip together.

The embodiments of the present disclosure relate to a power package module of multiple power chips and a method of manufacturing a power chip unit. The power package module of multiple power chips includes: a power chip unit including at least two power chips placed in parallel and a bonding part bonding the two power chips; a substrate supporting the power chip unit and including a metal layer electronically connecting with the power chip unit; and a sealing layer isolating the power chip unit on the substrate from surroundings to seal the power chip unit; the bonding part and the sealing layer are made from different insulated material, the distance of a gap between the two power chips placed in parallel is smaller than or equal to a preset width, and the bonding part is filled in the gap, insulatedly bonding the two power chips placed in parallel.

The disclosed component module includes a component comprising at least one electric contact to which at least one porous contact piece is connected; the component module further includes a cooling system for fluid-based cooling, said cooling system comprising one or more cooling ducts which are formed by pores of the porous contact piece. The disclosed power module comprises a component module of said type.

A semiconductor package is disclosed. In one example, the package includes a non-power chip including a first electrical contact arranged at a first main surface of the non-power chip. The semiconductor package further includes a power chip comprising a second electrical contact arranged at a second main surface of the power chip. A first electrical redistribution layer coupled to the first electrical contact and a second electrical redistribution layer coupled to the second electrical contact. When measured in a first direction vertical to at least one of the first main surface or the second main surface, a maximum thickness of at least a section of the first electrical redistribution layer is smaller than a maximum thickness of the second electrical redistribution layer.

In the semiconductor module according to the present invention, a conducting member which is used to electrically connect a semiconductor element arranged on a substrate or a bus bar with another electronic component is provided with a structure having flexibility capable of, in a junction with the semiconductor element, reducing the thermal stress due to difference in a coefficient of linear expansion between the conducting member and the semiconductor element, and absorbing dimensional error in objects to be connected. Therefore, the semiconductor module achieves both increased current capacity of the semiconductor device and improved reliability of the semiconductor module.

In the semiconductor module according to the present invention, a conducting member which is used to electrically connect a semiconductor element arranged on a substrate or a bus bar with another electronic component is provided with a structure having flexibility capable of, in a junction with the semiconductor element, reducing the thermal stress due to difference in a coefficient of linear expansion between the conducting member and the semiconductor element, and absorbing dimensional error in objects to be connected. Therefore, the semiconductor module achieves both increased current capacity of the semiconductor device and improved reliability of the semiconductor module.

The embodiments of the present disclosure relate to a power package module of multiple power chips and a method of manufacturing a power chip unit. The power package module of multiple power chips includes: a power chip unit including at least two power chips placed in parallel and a bonding part bonding the two power chips; a substrate supporting the power chip unit and including a metal layer electronically connecting with the power chip unit; and a sealing layer isolating the power chip unit on the substrate from surroundings to seal the power chip unit; the bonding part and the sealing layer are made from different insulated material, the distance of a gap between the two power chips placed in parallel is smaller than or equal to a preset width, and the bonding part is filled in the gap, insulatedly bonding the two power chips placed in parallel.