H01L24/94

CHEMICAL BONDING METHOD, PACKAGE-TYPE ELECTRONIC COMPONENT, AND HYBRID BONDING METHOD FOR ELECTRONIC DEVICE

Substrates that are bonding targets are bonded in ambient atmosphere via bonding films, including oxides, formed on bonding faces of the substrates. The bonding films, which are metal or semiconductor thin films formed by vacuum film deposition and at least the surfaces of which are oxidized, are formed into the respective smooth faces of two substrates having the smooth faces that serve as the bonding faces. The bonding films are exposed to a space that contains moisture, and the two substrates are overlapped in the ambient atmosphere such that the surfaces of the bonding films are made to be hydrophilic and the surfaces of the bonding films contact one another. Through this, a chemical bond is generated at the bonded interface, and thereby the two substrates are bonded together in the ambient atmosphere. The bonding strength γ can be improved by heating the bonded substrates at a temperature.

Sintering method using a sacrificial layer on the backside metallization of a semiconductor die
11581194 · 2023-02-14 · ·

An electronic device comprises a semiconductor die, a layer stack disposed on the semiconductor die and comprising one or more functional layers, wherein the layer stack comprises a protection layer which is an outermost functional layer of the layer stack, and a sacrificial layer disposed on the protection layer, wherein the sacrificial layer comprises a material which decomposes or becomes volatile at a temperature between 100° and 400° C.

Packaged semiconductor device and method of forming thereof

A semiconductor device includes a first die, a second die on the first die, and a third die on the second die, the second die being interposed between the first die and the third die. The first die includes a first substrate and a first interconnect structure on an active side of the first substrate. The second die includes a second substrate, a second interconnect structure on a backside of the second substrate, and a power distribution network (PDN) structure on the second interconnect structure such that the second interconnect structure is interposed between the PDN structure and the second substrate.

Substrate debonding apparatus

A substrate debonding apparatus configured to separate a support substrate attached to a first surface of a device substrate by an adhesive layer, the substrate debonding apparatus including a substrate chuck configured to support a second surface of the device substrate, the second surface being opposite to the first surface of the device substrate; a light irradiator configured to irradiate light to an inside of the adhesive layer; and a mask between the substrate chuck and the light irradiator, the mask including an opening through which an upper portion of the support substrate is exposed, and a first cooling passage or a second cooling passage, the first cooling passage being configured to provide a path in which a coolant is flowable, the second cooling passage being configured to provide a path in which air is flowable and to provide part of the air to a central portion of the opening.

Contactless high-frequency interconnect

Embodiments may relate to a multi-chip microelectronic package that includes a first die and a second die coupled to a package substrate. The first and second dies may have respective radiative elements that are communicatively coupled with one another such that they may communicate via an electromagnetic signal with a frequency at or above approximately 20 gigahertz (GHz). Other embodiments may be described or claimed.

Packaged multi-chip semiconductor devices and methods of fabricating same

A semiconductor package includes a first connection structure, a first semiconductor chip on an upper surface of the first connection structure, a first molding layer on the upper surface of the first connection structure and surrounding the first semiconductor chip, a first bond pad on the first semiconductor chip, a first bond insulation layer on the first semiconductor chip and the first molding layer and surrounding the first bond pad, a second bond pad directly contacting the first bond pad, a second bond insulation layer surrounding the second bond pad; and a second semiconductor chip on the second bond pad and the second bond insulation layer.

Protective wafer grooving structure for wafer thinning and methods of using the same

A bonded assembly of a first wafer including a first semiconductor substrate and a second wafer including a second semiconductor substrate may be formed. The second semiconductor substrate may be thinned to a first thickness, and an inter-wafer moat trench may be formed at a periphery of the bonded assembly. A protective material layer may be formed in the inter-wafer moat trench and over the backside surface of the second semiconductor substrate. A peripheral portion of the second semiconductor substrate located outside the inter-wafer moat trench may be removed, and a cylindrical portion of the protective material layer laterally surrounds a remaining portion of the bonded assembly. The second semiconductor substrate may be thinned to a second thickness by performing at least one thinning process while the cylindrical portion of the protective material layer protects the remaining portion of the bonded assembly.

Semiconductor device including an electrical contact with a metal layer arranged thereon

A semiconductor device includes a semiconductor die, an electrical contact arranged on a surface of the semiconductor die, and a metal layer arranged on the electrical contact, wherein the metal layer includes a singulated part of at least one of a metal foil, a metal sheet, a metal leadframe, or a metal plate. When viewed in a direction perpendicular to the surface of the semiconductor die, a footprint of the electrical contact and a footprint of the metal layer are substantially congruent.

ELECTRICAL CONNECTING STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
20230040128 · 2023-02-09 ·

An electrical connecting structure and a method for manufacturing the same are disclosed. The electrical connecting structure comprises: a first substrate; a second substrate; and an interconnect element disposed between the first substrate and the second substrate, wherein the interconnect element has a width, and no joint surface is present in the interconnect element in a range of 50% or more of the width.

Substrate bonding apparatus and method of manufacturing semiconductor device by using the substrate bonding apparatus

A substrate bonding apparatus includes a first bonding chuck configured to support a first substrate and a second bonding chuck configured to support a second substrate such that the second substrate faces the first substrate. The first bonding chuck includes a first base, a first deformable plate on the first base and configured to support the first substrate and configured to be deformed such that a distance between the first base and the first deformable plate is varied, and a first piezoelectric sheet on the first deformable plate and configured to be deformed in response to power applied thereto to deform the first deformable plate.