A solid-state image sensor including: a first impurity region of a first conductivity type; a plurality of second impurity regions of a second conductivity type disposed in the first impurity region and arranged in a first direction; and a light shielding layer that overlaps the first impurity region and does not overlap the second impurity regions in a plan view, wherein the first impurity region has a first portion between adjacent ones of the second impurity regions, the light shielding layer has a second portion that overlaps the first portion in a plan view, and a length of the second portion in the first direction is smaller than a length of the first portion in the first direction.

An image pickup element includes: a semiconductor substrate including a photoelectric conversion section for each pixel; a pixel separation groove provided in the semiconductor substrate; and a fixed charge film provided on a light-receiving surface side of the semiconductor substrate, wherein the fixed charge film includes a first insulating film and a second insulating film, the first insulating film being provided contiguously from the light-receiving surface to a wall surface and a bottom surface of the pixel separation groove, and the second insulating film being provided on a part of the first insulating film, the part corresponding to at least the light-receiving surface.

Provided is a semiconductor device capable of improving the optical response speed. The semiconductor device includes a pixel array portion in which a plurality of pixels are arranged in a matrix, each of the plurality of pixels including: a pixel forming region partitioned by a separation region in a semiconductor layer; a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type sequentially arranged from a first surface side of the pixel forming region toward a second surface side opposite to the first surface; a pn junction portion in which the first semiconductor region and the second semiconductor region are bonded; a charge extraction region of the second conductivity type provided in a side wall of the separation region; and a relay region of the second conductivity type provided at a position deeper than the second semiconductor region so as to be connected to the charge extraction region and the second semiconductor region. A plurality of the pn junction portions are scattered apart from each other, and the relay region has a higher impurity concentration than the second semiconductor region and terminates at a peripheral portion so as to surround a central portion of a surface of the second semiconductor region opposite to the pn junction portion side.

A radiation detector includes a photoelectric conversion element array, a scintillator layer converting radiation into light, a resin frame formed on the photoelectric conversion element array, and a protective film covering the scintillator layer. The resin frame has a groove continuous with an outer edge of the protective film. The groove has an overlapping region including a first groove end portion and a second groove end portion partially overlapping in a direction intersecting with an extension direction of the groove.

A semiconductor device includes an image sensor structure and a periphery device structure. The image sensor structure includes a first semiconductor substrate, a first interconnect structure, a radiation device, a transfer gate transistor electrically coupled to the radiation device, a floating diffusion region electrically coupled to the transfer gate, and a first capacitor disposed in the first interconnect structure. The transfer gate transistor electrically interconnects and disconnects the radiation device and the floating diffusion region. The periphery device structure includes a second interconnect structure disposed on the first interconnect structure, a second semiconductor substrate disposed on the second interconnect structure, a plurality of logic devices disposed in the second semiconductor substrate, and a second capacitor disposed in the second interconnect structure. The first capacitor and the second capacitor are electrically coupled to the floating diffusion region.

An image sensor is disclosed. In some implementations, the image sensor includes a substrate including one or more photoelectric conversion elements arranged in the substrate and structured to convert light into electrical signals representing an image carried by the light, and a plurality of metal layers arranged at different distances from a surface of the substrate and located below the one or more photoelectric conversion elements, each of the metal layers including one or more metal patterns. The one or more metal patterns of the plurality of metal layers are arranged in a concave shape facing the photoelectric conversion element such that incident light reflected by metal layers converges toward the photoelectric conversion element.

The present technology relates to techniques of preventing intrusion of moisture into a chip. Various illustrative embodiments include image sensors that include: a substrate; a plurality of layers stacked on the substrate; the plurality of layers including a photodiode layer having a plurality of photodiodes formed on a surface of the photodiode layer; the plurality of layers including at least one layer having a groove formed such that a portion of the at least one layer is excavated; and a transparent resin layer formed above the photodiode layer and formed in the groove. The present technology can be applied to, for example, an image sensor.

A solid-state imaging device includes a first and second pixel regions. In the first pixel region, a photoelectric conversion unit, a floating diffusion region (FD), and a transferring transistor are provided. In the second pixel region, an amplifying transistor, and a resetting transistor are provided. A first element isolation portion is provided in the first pixel region, while a second element isolation portion is provided in the second pixel region. An amount of protrusion of an insulating film into a semiconductor substrate in the first element isolation portion is smaller, than that in the second element isolation portion.

Embodiments of a hybrid imaging sensor that optimizes a pixel array area on a substrate using a stacking scheme for placement of related circuitry with minimal vertical interconnects between stacked substrates and associated features are disclosed. Embodiments of maximized pixel array size/die size (area optimization) are disclosed, and an optimized imaging sensor providing improved image quality, improved functionality, and improved form factors for specific applications common to the industry of digital imaging are also disclosed.

A solid state imaging device includes: a pixel array unit that has a plurality of pixels 2-dimensionally arranged in a matrix and a plurality of signal lines arranged along a column direction; A/D conversion units that are provided corresponding to the respective signal lines and convert an analog signal output from a pixel through the signal line into a digital signal; and a switching unit that switches or converts the analog signal output through each signal line into a digital signal using any of an A/D conversion unit provided corresponding to the signal line through which the analog signal is transmitted, and an A/D conversion unit provided corresponding to a signal line other than the signal line through which the analog signal is transmitted.