H01L29/125

QUANTUM DEVICE
20230231016 · 2023-07-20 · ·

A quantum device includes a transistor structure section having a source, a drain, and a gate, one or more quantum dot structure sections in which a charge is localizable, and a quantum bit control current line configured to change a state of the charge in the quantum dot structure section.

Device and method for work function reduction and thermionic energy conversion
11496072 · 2022-11-08 · ·

A quantum wire device includes a barrier formed by an insulator or a wide bandgap semiconductor, and metal quantum wires comprising a metal material and embedded in the barrier. Potential wells are formed for electrons in the metal quantum wires by the insulator or the wide bandgap semiconductor. The work function of the metal quantum wires is reduced by quantum confinement compared to a bulk form of the metal material. The metal quantum wires are electrically connected. The metal quantum wires include an exposed active area for electron emission or electron collection.

Quantum dot channel (QDC) quantum dot gate transistors, memories and other devices
09735236 · 2017-08-15 ·

This invention describes a field-effect transistor in which the channel is formed in an array of quantum dots. In one embodiment the quantum dots are cladded with a thin layer serving as an energy barrier. The quantum dot channel (QDC) may consist of one or more layers of cladded dots. These dots are realized on a single or polycrystalline substrate. When QDC FETs are realized on polycrystalline or nanocrystalline thin films they may yield higher mobility than in conventional nano- or microcrystalline thin films. These FETs can be used as thin film transistors (TFTs) in a variety of applications. In another embodiment QDC-FETs are combined with: (a) coupled quantum well SWS channels, (b) quantum dot gate 3-state like FETs, and (c) quantum dot gate nonvolatile memories.

Non-volatile composite nanoscopic fabric NAND memory arrays and methods of making same

A non-volatile nanotube switch and memory arrays constructed from these switches are disclosed. A non-volatile nanotube switch includes a conductive terminal and a nanoscopic element stack having a plurality of nanoscopic elements arranged in direct electrical contact, a first comprising a nanotube fabric and a second comprising a carbon material, a portion of the nanoscopic element stack in electrical contact with the conductive terminal. Control circuitry is provided in electrical communication with and for applying electrical stimulus to the conductive terminal and to at least a portion of the nanoscopic element stack. At least one of the nanoscopic elements is capable of switching among a plurality of electronic states in response to a corresponding electrical stimuli applied by the control circuitry to the conductive terminal and the portion of the nanoscopic element stack. For each electronic state, the nanoscopic element stack provides an electrical pathway of corresponding resistance.

Digital Circuits Comprising Quantum Wire Resonant Tunneling Transistors
20210399198 · 2021-12-23 ·

A digital circuit includes at least one quantum wire resonant tunneling transistor that includes an emitter terminal, a base terminal, a collector terminal, an emitter region in connection with the emitter terminal, a base region in connection with the base terminal, a collector region in connection with the collector terminal, an emitter barrier region between the emitter region and the base region, and a collector barrier region between the collector region and the base region. At least one of the emitter region, the base region, and the collector region includes a plurality of metal quantum wires.

Electromagnetic shielding element, and transmission line assembly and electronic structure package using the same

An electromagnetic shielding element and, transmission line assembly and electronic structure package using the same are provided. The electromagnetic shielding element is applied to the transmission line assembly and the electronic structure package to shield electromagnetic noise. The electromagnetic shielding element includes a quantum well structure, and the quantum well structure includes at least two barrier layers and at least one carrier confined layer located between the two barrier layers. Each barrier layer has a thickness between 0.1 nm and 500 nm, and the thickness of the carrier confined layer is between 0.1 nm and 500 nm. The electromagnetic shielding element absorbs electromagnetic wave noise to suppress electromagnetic interference.

Semiconductor film, solar cell, light-emitting diode, thin film transistor, and electronic device

A semiconductor film includes a cluster of semiconductor quantum dots each having a metal atom and ligands coordinating to respective semiconductor quantum dots, and the semiconductor quantum dots have an average shortest inter-dot distance of less than 0.45 nm. A solar cell, a light-emitting diode, a thin film transistor, and an electronic device include the semiconductor film.

Photoluminescent liquid crystal display

A photoluminescent liquid crystal display includes: a liquid crystal panel including a lower substrate, an upper substrate, a liquid crystal layer interposed between the upper and lower substrates, and a photoluminescent color filter layer disposed between the upper substrate and the liquid crystal layer; an optical device disposed on the upper substrate; a polarizing plate disposed under the lower substrate; and a backlight unit disposed under the polarizing plate and which emits blue light, where the photoluminescent color filter layer includes a first color filter which emits polarized red light, a second color filter which emits polarized green light, and a third color filter which emits polarized blue light, and the first color filter and the second color filter include a semiconductor nanocrystal-polymer composite.

PROCESS FOR PRODUCING ADJACENT CHIPS COMPRISING LED WIRES AND DEVICE OBTAINED BY THE PROCESS
20210234066 · 2021-07-29 ·

A process for producing at least two adjacent regions, each comprising an array of light-emitting wires connected together in a given region by a transparent conductive layer, comprises: producing, on a substrate, a plurality of individual zones for growing wires extending over an area greater than the cumulative area of the two chips; growing wires in the individual growth zones; removing wires from at least one zone forming an initial free area to define the arrays of wires, the initial free area comprising individual growth zones level with the removed wires; and depositing a transparent conductive layer on each array of wires to electrically connect the wires of a given array of wires, each conductive layer being separated from the conductive layer of the neighbouring region by a free area. A device obtained using the process of the invention is also provided.

Process for producing adjacent chips comprising LED wires and device obtained by the process

A process for producing at least two adjacent regions, each comprising an array of light-emitting wires connected together in a given region by a transparent conductive layer, comprises: producing, on a substrate, a plurality of individual zones for growing wires extending over an area greater than the cumulative area of the two chips; growing wires in the individual growth zones; removing wires from at least one zone forming an initial free area to define the arrays of wires, the initial free area comprising individual growth zones level with the removed wires; and depositing a transparent conductive layer on each array of wires to electrically connect the wires of a given array of wires, each conductive layer being separated from the conductive layer of the neighbouring region by a free area. A device obtained using the process of the invention is also provided.