Patent classifications
H01L29/765
DETECTION CIRCUIT FOR PHOTO SENSOR WITH STACKED SUBSTRATES
Embodiments relate to a stacked photo sensor assembly where two substrates are stacked vertically. The two substrates are connected via interconnects at a pixel level to provide a signal from a photodiode at a first substrate to circuitry on a second substrate. The circuitry on the second substrate performs operations that were conventionally performed on first substrate. More specifically, charge storage of the first substrate is replaced with capacitors on the second substrate. A voltage signal corresponding to the amount of charge in the first substrate is generated and processed in the second substrate. By stacking the first and second substrates, the photo sensor assembly can be made more compact while increasing or at least retaining the photodiode fill factor of the photo sensor assembly.
Low-voltage charge-coupled devices with a heterostructure charge-storage well
A CCD with an internal heterostructure well to store the photogenerated carriers is realized by using barrier and absorber semiconductors with a type-II band alignment in nBn or pBp photodetectors to form a specific barrier configured to confine the depletion region and a well to trap and store the photogenerated minority carriers. Depending on the spectral regime, (InAs/InAsSb)/(InAs/AlGaSb) superlattices can be used in the infrared, Si/Ge or AlP/GaP in the visible portion of optical spectrum, and GaN/ZnO in the UV portion. The resulting device not only leverages the advantages of the conventional CCD (such as in-pixel signal integration to suppress the noise), but also boasts an advantageously low operational voltage, thereby ensuring the low power consumption and low band-to-band tunneling current/noise (in particular, for use as an infrared photodetector). In comparison with IR FPAs of related art, the cost of the device is reduced and no flip-chip mount on a read-out integrated circuit is required during the fabrication process.
Low-voltage charge-coupled devices with a heterostructure charge-storage well
A CCD with an internal heterostructure well to store the photogenerated carriers is realized by using barrier and absorber semiconductors with a type-II band alignment in nBn or pBp photodetectors to form a specific barrier configured to confine the depletion region and a well to trap and store the photogenerated minority carriers. Depending on the spectral regime, (InAs/InAsSb)/(InAs/AlGaSb) superlattices can be used in the infrared, Si/Ge or AlP/GaP in the visible portion of optical spectrum, and GaN/ZnO in the UV portion. The resulting device not only leverages the advantages of the conventional CCD (such as in-pixel signal integration to suppress the noise), but also boasts an advantageously low operational voltage, thereby ensuring the low power consumption and low band-to-band tunneling current/noise (in particular, for use as an infrared photodetector). In comparison with IR FPAs of related art, the cost of the device is reduced and no flip-chip mount on a read-out integrated circuit is required during the fabrication process.
Embedded image sensor semiconductor packages and related methods
An embedded image sensor package including a transparent cover having a first side and an opposing second side. A first layer couples over the second side of the transparent cover and has an opening. An electrically conductive layer couples in or over the first layer and electrically couples with one or more electrical contacts exposed on an outer surface of the package. An image sensor chip having a first side with an image sensor and an opposing second side electrically couples with the electrically conductive layer at the first side of the image sensor chip. The image sensor chip couples over the first layer so the first side of the image sensor chip faces the second side of the transparent cover through the opening. The image sensor chip, first layer, and transparent cover at least partially define a cavity hermetically sealed using an underfill material. The package includes no wirebonds.
LOW-VOLTAGE CHARGE-COUPLED DEVICES WITH A HETEROSTRUCTURE CHARGE-STORAGE WELL
A CCD with an internal heterostructure well to store the photogenerated carriers is realized by using barrier and absorber semiconductors with a type-II band alignment in nBn or pBp photodetectors to form a specific barrier configured to confine the depletion region and a well to trap and store the photogenerated minority carriers. Depending on the spectral regime, (InAs/InAsSb)/(InAs/AlGaSb) superlattices can be used in the infrared, Si/Ge or AlP/GaP in the visible portion of optical spectrum, and GaN/ZnO in the UV portion. The resulting device not only leverages the advantages of the conventional CCD (such as in-pixel signal integration to suppress the noise), but also boasts an advantageously low operational voltage, thereby ensuring the low power consumption and low band-to-band tunneling current/noise (in particular, for use as an infrared photodetector). In comparison with IR FPAs of related art, the cost of the device is reduced and no flip-chip mount on a read-out integrated circuit is required during the fabrication process.
LOW-VOLTAGE CHARGE-COUPLED DEVICES WITH A HETEROSTRUCTURE CHARGE-STORAGE WELL
A CCD with an internal heterostructure well to store the photogenerated carriers is realized by using barrier and absorber semiconductors with a type-II band alignment in nBn or pBp photodetectors to form a specific barrier configured to confine the depletion region and a well to trap and store the photogenerated minority carriers. Depending on the spectral regime, (InAs/InAsSb)/(InAs/AlGaSb) superlattices can be used in the infrared, Si/Ge or AlP/GaP in the visible portion of optical spectrum, and GaN/ZnO in the UV portion. The resulting device not only leverages the advantages of the conventional CCD (such as in-pixel signal integration to suppress the noise), but also boasts an advantageously low operational voltage, thereby ensuring the low power consumption and low band-to-band tunneling current/noise (in particular, for use as an infrared photodetector). In comparison with IR FPAs of related art, the cost of the device is reduced and no flip-chip mount on a read-out integrated circuit is required during the fabrication process.