Patent classifications
H01L29/864
HIGH-VOLTAGE FAST-AVALANCHE DIODE
A high-voltage fast-avalanche diode, being a silicon-avalanche shaper or sharpener (SAS), has a thick active region above 300 microns in thickness.
HIGH-VOLTAGE FAST-AVALANCHE DIODE
A high-voltage fast-avalanche diode, being a silicon-avalanche shaper or sharpener (SAS), has a thick active region above 300 microns in thickness.
TRANSIENT SUPPRESSING CIRCUIT ARRANGEMENTS
Transient suppression circuit arrangements are disclosed. In one implementation of a transient suppression circuit, at least one avalanche diode is coupled in series with a DIAC, a silicon diode for alternating current (SIDAC) device or SIDACtor.
TERAHERTZ DEVICE
A terahertz device includes a base member, a terahertz element, an antenna base, and a reflection film. The terahertz element is mounted on the base member and configured to generate an electromagnetic wave. The antenna base is located opposing the base member and includes an antenna surface. The reflection film is formed on the antenna surface to reflect at least part of the electromagnetic wave generated by the terahertz element in one direction.
DEVICES AND METHODS INVOLVING ACTIVATION OF BURIED DOPANTS USING ION IMPLANTATION AND POST-IMPLANTATION ANNEALING
In certain examples, methods and semiconductor structures are directed to use of a doped buried region (e.g., Mg-dopant) including a III-Nitride material and having a diffusion path (“ion diffusion path”) that includes hydrogen introduced by using ion implantation via at least one ion species. An ion implantation thermal treatment causes hydrogen to diffuse through the ion implanted path and causes activation of the buried region. In more specific examples in which such semiconductor structures have an ohmic contact region at which a source of a transistor interfaces with the buried region, the ohmic contact region is without etching-based damage due at least in part to the post-ion implantation thermal treatment.
Diode devices and methods of forming a diode device
According to various embodiments, there is provided a diode device including a semiconductor substrate of a first conductivity type, a first semiconductor region formed within the semiconductor substrate, an epitaxial region of the first conductivity type, and a second semiconductor region of a second conductivity type different from the first conductivity type. The first semiconductor region includes a chalcogen. The epitaxial region is formed over the first semiconductor region. The second semiconductor region is formed over the epitaxial region.
Diode devices and methods of forming a diode device
According to various embodiments, there is provided a diode device including a semiconductor substrate of a first conductivity type, a first semiconductor region formed within the semiconductor substrate, an epitaxial region of the first conductivity type, and a second semiconductor region of a second conductivity type different from the first conductivity type. The first semiconductor region includes a chalcogen. The epitaxial region is formed over the first semiconductor region. The second semiconductor region is formed over the epitaxial region.
DIODE DEVICES AND METHODS OF FORMING A DIODE DEVICE
According to various embodiments, there is provided a diode device including a semiconductor substrate of a first conductivity type, a first semiconductor region formed within the semiconductor substrate, an epitaxial region of the first conductivity type, and a second semiconductor region of a second conductivity type different from the first conductivity type. The first semiconductor region includes a chalcogen. The epitaxial region is formed over the first semiconductor region. The second semiconductor region is formed over the epitaxial region.
Transient voltage suppression diodes with reduced harmonics, and methods of making and using
A semiconductor device includes a semiconductor die. A transient voltage suppression (TVS) structure is formed in the semiconductor die. A capacitor is formed over the semiconductor die. In one embodiment, the capacitor is formed by depositing a first conductive layer over the semiconductor die, depositing an insulating layer over the first conductive layer, and depositing a second conductive layer over the semiconductor die. In another embodiment, the capacitor is formed by forming a trench in the semiconductor die, depositing an insulating material in the trench, and depositing a conductive material in the trench.
Transient voltage suppression diodes with reduced harmonics, and methods of making and using
A semiconductor device includes a semiconductor die. A transient voltage suppression (TVS) structure is formed in the semiconductor die. A capacitor is formed over the semiconductor die. In one embodiment, the capacitor is formed by depositing a first conductive layer over the semiconductor die, depositing an insulating layer over the first conductive layer, and depositing a second conductive layer over the semiconductor die. In another embodiment, the capacitor is formed by forming a trench in the semiconductor die, depositing an insulating material in the trench, and depositing a conductive material in the trench.