H01L2924/16196

Foil-based package with distance compensation

A foil-based package and a method for manufacturing a foil-based package includes, among other things, a first and a second foil substrate. An electronic component is arranged between the two foil substrates in a sandwich-like manner. Due to the component thickness, there is a distance difference between the two foil substrates between the mounting area of the component and ears outside of the mounting area. The foil-based package and the method provides means for reducing and/or compensating a distance difference between the first foil substrate and the second foil substrate caused by the component thickness.

SEMICONDUCTOR PACKAGE HAVING PACKAGE HOUSING IN ENGRAVED SURFACE FORM AND METHOD OF MANUFACTURING THE SAME
20230011694 · 2023-01-12 · ·

Provided is a semiconductor package having a package housing in an engraved surface form and a method of manufacturing the same, wherein the semiconductor package includes: at least one substrate on which at least one semiconductor chip is installed; at least one terminal lead electrically connected to the substrates; electrical connectors for connecting the semiconductor chips to the substrates or the terminal leads; a package housing covering the semiconductor chips, the electrical connectors, and the at least one substrate; at least one stopper which is formed of a material same as that of the package housing, is higher by a certain height than exposed surfaces of the substrates, is disposed on the exposed surfaces of the substrates, or covers at least a part of the exposed surfaces; and at least one heat sink transmitting heat from the semiconductor chips and radiating heat, wherein the at least a part of the exposed surfaces of the at least one substrate is formed on the upper surface, the lower surface, or the upper and lower surfaces of the package housing and the exposed surfaces of the at least one substrate are joined to the heat sinks by using heat transfer connectors interposed therebetween. Accordingly, the full thickness of the heat transfer connectors may be uniformly maintained.

Semiconductor package with heatsink
11694972 · 2023-07-04 · ·

A semiconductor package includes a substrate, a semiconductor die mounted on the substrate, and a heatsink over the semiconductor die. The heatsink includes a roof portion and at least one connecting portion extending between the roof portion and the substrate. The at least one connecting portion includes a connection lead mounted on a connection pad of the substrate. The connection pad includes a first portion and a second portion spaced apart from each other, which are configured to electrically couple to different voltage signals, respectively, for detecting heatsink floating.

CLIP STRUCTURE FOR SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
20220399300 · 2022-12-15 · ·

Provided is a clip structure for a semiconductor package comprising: a first bonding unit bonded to a terminal part of an upper surface or a lower surface of a semiconductor device by using a conductive adhesive interposed therebetween, a main connecting unit which is extended and bent from the first bonding unit, a second bonding unit having an upper surface higher than the upper surface of the first bonding unit, an elastic unit elastically connected between the main connecting unit and one end of the second bonding unit, and a supporting unit bent and extended from the other end of the second bonding unit toward the main connecting unit, wherein the supporting unit is formed to incline at an angle of 1° through 179° from an extended surface of the main connecting unit and has an elastic structure so that push-stress applying to the semiconductor device while molding may be dispersed.

Device package with reduced radio frequency losses

A device package includes a semiconductor device. The semiconductor device is disposed on a substrate. The device package further includes a covering. The covering is disposed on the substrate and surrounds the semiconductor device. The covering includes a void, a first layer, and a second layer. The void is between an interior surface of the covering and the semiconductor device. The first layer has a first electrical conductivity and a first thickness. The second layer is disposed under the first layer. The second layer has a second electrical conductivity and a second thickness. The first electrical conductivity is greater than the second electrical conductivity. The first thickness is less than the second thickness.

Integrated circuit packages to minimize stress on a semiconductor die

An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.

INTEGRATED CIRCUIT PACKAGES TO MINIMIZE STRESS ON A SEMICONDUCTOR DIE

An integrated circuit package can contain a semiconductor die and provide electrical connections between the semiconductor die and additional electronic components. The integrated circuit package can reduce stress placed on the semiconductor die due to movement of the integrated circuit package due to, for example, temperature changes and/or moisture levels. The integrated circuit package can at least partially mechanically isolate the semiconductor die from the integrated circuit package.

POWER MODULE

A power module includes a first conductor plate to which a first power semiconductor element is bonded, a second conductor plate to which a second power semiconductor element is bonded, the second conductor plate being disposed adjacent to the first conductor plate, a first heat-dissipating member disposed counter to the first conductor plate and the second conductor plate, and a first insulating sheet member disposed between the first heat-dissipating member and the first conductor plate. The first power semiconductor element is disposed at a position at which a first length from an end of the first conductor plate, the end being closer to the second conductor plate, to the first power semiconductor element is larger than a second length from an end of the first conductor plate, the end being far from the second conductor plate, to the first power semiconductor element, and the second length is larger than the thickness of the first conductor plate.

ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF

A method of manufacturing an electronic package is provided, in which a package module including a routing structure is stacked on a carrier structure via a plurality of conductive elements, a heat dissipation member covers a part of a surface of the routing structure, and an electronic module is disposed on another part of the surface of the routing structure, so that the routing structure is formed with at least one heat dissipation pad bonded to the heat dissipation member, such that the heat energy of the electronic module and the package module can be dissipated via the heat dissipation pad and the heat dissipation member.

SEMICONDUCTOR DEVICE
20170287805 · 2017-10-05 ·

A semiconductor device includes a wiring substrate, a semiconductor element mounted on the wiring substrate, a heat dissipation plate bonded to an upper surface of the semiconductor element with an adhesive, and an encapsulation resin that fills a gap between the heat dissipation plate and the wiring substrate. The heat dissipation plate includes a body overlapped with the semiconductor element in a plan view. The body is larger than the semiconductor element in a plan view. A projection is formed integrally with the body. The projection projects outward from an end of the body and is located at a lower position than the body. The encapsulation resin covers upper, lower, and side surfaces of the projection. The body includes an upper surface exposed from the encapsulation resin.