A radio frequency amplifier includes a first input terminal, a second input terminal, an output terminal, and first and second amplifiers. The first amplifier includes a first amplifier input coupled to the first input terminal, and a first amplifier output. The second amplifier includes a second amplifier input coupled to the second input terminal, and a second amplifier output coupled to the output terminal by an output inductive element. An output combiner circuit is coupled between the first amplifier output and the second amplifier output. The output combiner circuit includes a first inductive element, a capacitor, and a second inductive element. The first inductive element is coupled between the first amplifier output and a first terminal of the capacitor, and the second inductive element is coupled between the second amplifier output and the first terminal of the capacitor. A second terminal of the capacitor is coupled to ground.

The invention discloses a semiconductor package structure including a package carrier, at least one electronic component, a packaging layer, a support component and a shielding layer. The electronic component is disposed on a first surface of the package carrier. The packaging layer is disposed on the first surface and covers the electronic component. The support component is embedded in the packaging layer to surround the electronic component. An end surface of the support component is electrically connected to a build-up circuit and electrically grounded. A patterned metal layer of the shielding layer is electrically connected to the support component. The shielding range of the patterned metal layer covers at least electronic component. A shielding space, which covers the electronic component, is formed by the support component and the shielding layer. In addition, a semiconductor EMI shielding component and a method of making a semiconductor package structure are also disclosed.

A semiconductor module includes at least two semiconductor elements connected in parallel; a control circuit board placed between the at least two semiconductor elements; a control terminal for external connection; a first wiring member that connects the control terminal and the control circuit board; and a second wiring member that connects a control electrode of one of the at least two semiconductor elements and the control circuit board, wherein the second wiring member is wire-bonded from the control electrode towards the control circuit board, and has a first end on the control electrode and a second end on the control circuit board, the first end having a cut end face facing upward normal to a surface of the control electrode and the second end having a cut end face facing sideways parallel to a surface of the control circuit board.

Provided is a power semiconductor module that can secure insulating properties. A semiconductor element is mounted on a resin-insulated base plate including a circuit pattern, a resin insulating layer, and a base plate. A case enclosing the resin-insulated base plate is bonded to the resin insulating layer with an adhesive. The resin insulating layer and the case are bonded together with a region enclosed by the resin insulating layer and a tapered portion of the case formed closer to the resin insulating layer being filled with the adhesive made of a material identical to that of the sealing resin. Air bubbles in the adhesive appear in the tapered portion opposite to the resin insulating layer.

A radio frequency (RF) transistor amplifier package includes a submount, and first and second leads extending from a first side of the submount. The first and second leads are configured to provide RF signal connections to one or more transistor dies on a surface of the submount. At least one rivet is attached to the surface of the submount between the first and second leads on the first side. One or more corners of the first side of the submount may be free of rivets. Related devices and associated RF leads and non-RF leads are also discussed.

Provided is a semiconductor module including a main circuit portion, a plurality of circuit electrodes, a plurality of main terminals, and a plurality of wires, in each of semiconductor chips, transistor portions and diode portions have a longitudinal side in a second direction, each of semiconductor chips has a plurality of end sides including a gate-side end side, each of the gate-side end sides is arranged facing a same side in a top view, the plurality of main terminals are arranged on a same side in relation to the main circuit portion so as not to sandwich the main circuit portion in a top view, each of the plurality of wires has a bonding portion, and a longitudinal direction of the bonding portion has an angle in relation to the second direction.

A semiconductor device includes a substrate, an active region provided in the substrate, a plurality of gate fingers provided on the active region, extending in an extension direction, and arranged in an arrangement direction orthogonal to the extension direction, and a gate connection wiring commonly connected to the plurality of gate fingers and provided between the plurality of gate fingers and a first side surface of the substrate, wherein when viewed from the arrangement direction, a first position where a first end of a first gate finger as a part of the plurality of gate fingers is connected to the gate connection wiring is closer to the first side surface than a second position where a first end of a second gate finger as another part of the plurality of gate fingers is connected to the gate connection wiring.

In a method of manufacturing a semiconductor package, a first semiconductor device is arranged on a package substrate. An electrostatic discharge structure is formed on at least one ground substrate pad exposed from an upper surface of the package substrate. A plurality of second semiconductor devices is stacked on the package substrate and spaced apart from the first semiconductor device, the electrostatic discharge structure being interposed between the first semiconductor device and the plurality of second semiconductor devices. A molding member is formed on the package substrate to cover the first semiconductor device and the plurality of second semiconductor devices.

A semiconductor device includes a switching element, a control circuit, and a first and second temperature detectors. The control circuit controls the switching element and have an overcurrent detection circuit for the switching element. The first temperature detector detects the temperature of the switching element and the second temperature detector detects the temperature of the control circuit. The control circuit includes a reference correction circuit for correcting an overcurrent reference value of the overcurrent detection circuit on the basis of a first detection value and a second detection value detected by the first and second temperature detectors and outputting a corrected overcurrent reference value.

Microelectronic devices and methods for manufacturing such devices are disclosed herein. In one embodiment, a packaged microelectronic device can include an interposer substrate with a plurality of interposer contacts. A microelectronic die is attached and electrically coupled to the interposer substrate. The device further includes a casing covering the die and at least a portion of the interposer substrate. A plurality of electrically conductive through-casing interconnects are in contact with and projecting from corresponding interposer contacts at a first side of the interposer substrate. The through-casing interconnects extend through the thickness of the casing to a terminus at the top of the casing. The through-casing interconnects comprise a plurality of filaments attached to and projecting away from the interposer contacts in a direction generally normal to the first side of the interposer substrate.