Patent classifications
H01L2924/20103
ENHANCED CLEANING FOR WATER-SOLUBLE FLUX SOLDERING
An approach to provide an electronic assembly process that includes receiving at least one electronic assembly after a solder reflow process using a Sn-containing solder and a water-soluble flux. The approach includes baking the at least one electronic assembly in an oxygen containing environment and, then cleaning the at least one electronic assembly in an aqueous cleaning process.
ENHANCED CLEANING FOR WATER-SOLUBLE FLUX SOLDERING
An approach to provide an electronic assembly process that includes receiving at least one electronic assembly after a solder reflow process using a Sn-containing solder and a water-soluble flux. The approach includes baking the at least one electronic assembly in an oxygen containing environment and, then cleaning the at least one electronic assembly in an aqueous cleaning process.
METHOD OF MANUFACTURING A REDISTRIBUTION LAYER, REDISTRIBUTION LAYER AND INTEGRATED CIRCUIT INCLUDING THE REDISTRIBUTION LAYER
A method of manufacturing a redistribution layer includes: forming an insulating layer on a wafer, delimited by a top surface and a bottom surface in contact with the wafer; forming a conductive body above the top surface of the insulating layer; forming a first coating region extending around and above the conductive body, in contact with the conductive body, and in contact with the top surface of the insulating layer in correspondence of a bottom surface of the first coating region; applying a thermal treatment to the wafer in order to modify a residual stress of the first coating region, forming a gap between the bottom surface of the first coating region and the top surface of the insulating layer; forming, after applying the thermal treatment, a second coating region extending around and above the first coating region, filling said gap and completely sealing the first coating region.
SELF-DENSIFYING NANO-SILVER PASTE AND A METHOD OF FORMING INTERCONNECT LAYER FOR HIGH POWER ELECTRONICS
A self-densifying interconnection is formed between a high-temperature semiconductor device selected from a GaN or SiC-based device and a substrate. The interconnection includes a matrix of micron-sized silver particles in an amount from approximately 10 to 60 weight percent; the micron-sized silver particles having a particle size ranging from approximately 0.1 microns to 15 microns. Bonding particles are used to chemically bind the matrix of micron-sized silver particles. The bonding particles are core silver nanoparticles with in-situ formed surface silver nanoparticles chemically bound to the surface of the core silver nanoparticles and, at the same time, chemically bound to the matrix of micron-sized silver particles. The bonding particles have a core particle size ranging from approximately 10 to approximately 100 nanometers while the in-situ formed surface silver nanoparticles have a particle size of approximately 3-9 nanometers.
Mounting method and mounting device
A mounting method is a method for mounting a diced semiconductor chip having a first face that is held on a carrier substrate and a second face that is an opposite face of the first face on a circuit board placed on a mounting table. The mounting method includes affixing the second face of the semiconductor chip to an adhesive sheet, removing the carrier substrate from the semiconductor chip, reducing an adhesive strength of the adhesive sheet, and mounting the semiconductor chip on the circuit board by holding a first face side of the semiconductor chip with a head to separate the semiconductor chip from the adhesive sheet, and joining a second face side of the semiconductor chip to the circuit board.
Method of manufacturing a redistribution layer, redistribution layer and integrated circuit including the redistribution layer
A method of manufacturing a redistribution layer includes: forming an insulating layer on a wafer, delimited by a top surface and a bottom surface in contact with the wafer; forming a conductive body above the top surface of the insulating layer; forming a first coating region extending around and above the conductive body, in contact with the conductive body, and in contact with the top surface of the insulating layer in correspondence of a bottom surface of the first coating region; applying a thermal treatment to the wafer in order to modify a residual stress of the first coating region, forming a gap between the bottom surface of the first coating region and the top surface of the insulating layer; forming, after applying the thermal treatment, a second coating region extending around and above the first coating region, filling said gap and completely sealing the first coating region.
SENSOR AND MANUFACTURING METHOD THEREOF
Provided is a manufacturing method of a sensor including the following steps. A mold having a cavity is provided. At least one chip is disposed in the cavity. The chip has an active surface and a back surface opposite to each other. The active surface faces toward a bottom surface of the cavity. A polymer material is filled in the cavity to cover the back surface of the chip. A heat treatment is performed, such that the polymer material is solidified to form a polymer substrate. A mold release treatment is performed to isolate the polymer substrate from the cavity. A plurality of conductive lines are formed on a first surface of the polymer substrate. The conductive lines are electrically connected with the chip.
ENHANCED CLEANING FOR WATER-SOLUBLE FLUX SOLDERING
An approach to provide an electronic assembly process that includes receiving at least one electronic assembly after a solder reflow process using a Sn-containing solder and a water-soluble flux. The approach includes baking the at least one electronic assembly in an oxygen containing environment and, then cleaning the at least one electronic assembly in an aqueous cleaning process.
ENHANCED CLEANING FOR WATER-SOLUBLE FLUX SOLDERING
An approach to provide an electronic assembly process that includes receiving at least one electronic assembly after a solder reflow process using a Sn-containing solder and a water-soluble flux. The approach includes baking the at least one electronic assembly in an oxygen containing environment and, then cleaning the at least one electronic assembly in an aqueous cleaning process.
Package structure and method for connecting components
A package structure and a method for connecting components are provided, in which the package includes a first substrate including a first wiring and at least one first contact connecting to the first wiring; a second substrate including a second wiring and at least one second contact connecting to the second wiring, the at least one first contact and the at least one second contact partially physically contacting with each other or partially chemically interface reactive contacting with each other; and at least one third contact surrounding the at least one first contact and the at least one second contact. The first substrate and the second substrate are electrically connected with each other at least through the at least one first contact and the at least one second contact.