H01L2924/403

PRINTED CIRCUIT BOARD AND SEMICONDUCTOR PACKAGE
20170309559 · 2017-10-26 ·

A printed circuit board (PCB) includes an insulating layer with an upper surface and a lower surface opposite to the upper surface; a first conductive pattern on the upper surface of the insulating layer; a second conductive pattern on the lower surface of the insulating layer; an aluminum pattern that covers at least a portion of an upper surface of the first conductive pattern; and a first passivation layer that covers at least a portion of sides of the first conductive pattern and that prevents diffusion into the first conductive pattern.

Printed circuit board and semiconductor package
10950517 · 2021-03-16 · ·

A printed circuit board (PCB) includes an insulating layer with an upper surface and a lower surface opposite to the upper surface; a first conductive pattern on the upper surface of the insulating layer; a second conductive pattern on the lower surface of the insulating layer; an aluminum pattern that covers at least a portion of an upper surface of the first conductive pattern; and a first passivation layer that covers at least a portion of sides of the first conductive pattern and that prevents diffusion into the first conductive pattern.

PRINTED CIRCUIT BOARD AND SEMICONDUCTOR PACKAGE
20200176344 · 2020-06-04 ·

A printed circuit board (PCB) includes an insulating layer with an upper surface and a lower surface opposite to the upper surface; a first conductive pattern on the upper surface of the insulating layer; a second conductive pattern on the lower surface of the insulating layer; an aluminum pattern that covers at least a portion of an upper surface of the first conductive pattern; and a first passivation layer that covers at least a portion of sides of the first conductive pattern and that prevents diffusion into the first conductive pattern.

Printed circuit board and semiconductor package
10586748 · 2020-03-10 · ·

A printed circuit board (PCB) includes an insulating layer with an upper surface and a lower surface opposite to the upper surface; a first conductive pattern on the upper surface of the insulating layer; a second conductive pattern on the lower surface of the insulating layer; an aluminum pattern that covers at least a portion of an upper surface of the first conductive pattern; and a first passivation layer that covers at least a portion of sides of the first conductive pattern and that prevents diffusion into the first conductive pattern.

SEMICONDUCTOR PACKAGE INCLUDING A SEMICONDUCTOR DIE HAVING REDISTRIBUTED PADS
20180366380 · 2018-12-20 ·

A semiconductor package that includes a semiconductor die, an insulation around the die, and a conforming conductive pad coupled to an electrode of the die.

Semiconductor package including a semiconductor die having redistributed pads

A method includes coupling a first major surface of a semiconductor die to a metallic body, depositing an insulation body over said semiconductor die, and removing a portion of said insulation body to expose a plurality of electrodes of said semiconductor die on a second major surface of said semiconductor die opposite said first surface. The method further includes forming a plurality of conductive pads over the plurality of electrodes, each conductive pad of said plurality of conductive pads providing an external connection for a respective one of said plurality of electrodes, wherein each conductive pad of said plurality of conductive pads has an area larger than an area of said respective one of said plurality of electrodes to which the respective conforming conductive pad of said plurality of conductive pads is coupled and extending over said insulation body.

SEMICONDUCTOR PACKAGE INCLUDING A SEMICONDUCTOR DIE HAVING REDISTRIBUTED PADS
20170148692 · 2017-05-25 ·

A semiconductor package that includes a semiconductor die, an insulation around the die, and a conforming conductive pad coupled to an electrode of the die.

Semiconductor package including a semiconductor die having redistributed pads

A semiconductor package that includes a semiconductor die, an insulation around the die, and a conforming conductive pad coupled to an electrode of the die.