H01L31/02016

Electronic IC device comprising integrated optical and electronic circuit component and fabrication method

A first circuit structure of an electronic IC device includes comprises light-sensitive optical circuit components. A second circuit structure of the electronic IC device includes an electronic circuit component and an electrically-conductive layer extending between and at a distance from the optical circuit components and the electronic circuit component. Electrical connections link the optical circuit components and the electronic circuit component. These electrical connections are formed in holes which pass through dielectric layers and the intermediate conductive layer. Electrical insulation rings between the electrical connections and the conductive layer are provided which surround the electrical connections and have a thickness equal to a thickness of the conductive layer.

PHOTOCONDUCTOR READOUT CIRCUIT

Disclosed herein is a device including at least one photoconductor configured for exhibiting an electrical resistance R.sub.photo dependent on an illumination of a light-sensitive region of the photoconductor; at least one photoconductor readout circuit, where the photoconductor readout circuit is configured for determining a differential voltage related to changes of the electrical resistance R.sub.photo of the photoconductor, where the photoconductor readout circuit includes at least one bias voltage source configured for applying at least one periodically modulated bias voltage to the photoconductor such that the electric output changes its polarity at least once; and at least one electrical circuit configured to balance the differential voltage at a given illumination level.

Interconnection of neighboring solar cells on a flexible supporting film

A method of fabricating a solar cell assembly comprising a plurality of solar cells mounted on a flexible support, the support comprising a conductive layer on the top surface thereof divided into two electrically isolated portions—a first conductive portion and a second conductive portion. Each solar cell comprises a front surface, a rear surface, and a first contact on the rear surface and a second contact on the front surface. Each one of the plurality of solar cells is placed on the first conductive portion with the first contact electrically connected to the first conductive portion so that the solar cells are connected through the first conductive portion. A second contact of each solar cell is then connected to the second conductive portion by an interconnect. The two conductive portions serve as bus bars representing contacts of two different polarities of the solar cell assembly.

MICROSTRUCTURE ENHANCED ABSORPTION PHOTOSENSITIVE DEVICES
20230215962 · 2023-07-06 ·

Techniques for enhancing the absorption of photons in semiconductors with the use of microstructures are described. The microstructures, such as pillars and/or holes, effectively increase the effective absorption length resulting in a greater absorption of the photons. Using microstructures for absorption enhancement for silicon photodiodes and silicon avalanche photodiodes can result in bandwidths in excess of 10 Gb/s at photons with wavelengths of 850 nm, and with quantum efficiencies of approximately 90% or more.

Image sensors for measuring distance including delay circuits for transmitting separate delay clock signals

An image sensor includes a plurality of pixels and photo gate controller circuitry. Each pixel may transmit a pixel signal, corresponding to a photoelectric signal, in response to a photo gate signal in a frame. The photo gate controller circuitry may generate photo gate signals and transmit photo gate signals to the pixels. The photo gate controller circuitry includes a first delay circuit configured to transmit first delay clock signals each being delayed with respect to a reference clock signal by a certain amount of time and a second delay circuit configured to transmit second delay clock signals each being delayed with respect to the reference clock signal by a certain amount of time. The pixels are each configured to selectively receive signals, as the photo gate signals, among the delay clock signals output from the first delay circuit and the delay clock signals output from the second delay circuit.

MICROSTRUCTURE ENHANCED ABSORPTION PHOTOSENSITIVE DEVICES
20230054279 · 2023-02-23 ·

Microstructures of micro and/or nano holes on one or more surfaces enhance photodetector optical sensitivity. Arrangements such as a CMOS Image Sensor (CIS) as an imaging LIDAR using a high speed photodetector array wafer of Si, Ge, a Ge alloy on SI and/or Si on Ge on Si, and a wafer of CMOS Logic Processor (CLP) ib Si fi signal amplification, processing and/or transmission can be stacked for electrical interaction. The wafers can be fabricated separately and then stacked or can be regions of the same monolithic chip. The image can be a time-of-flight image. Bayer arrays can be enhanced with microstructure holes. Pixels can be photodiodes, avalanche photodiodes, single photon avalanche photodiodes and phototransistors on the same array and can be Ge or Si pixels. The array can be of high speed photodetectors with data rates of 56 Gigabits per second, Gbps, or more per photodetector.

Method and system for process and temperature compensation in a transimpedance amplifier using a dual replica

The present disclosure provides for process and temperature compensation in a transimpedance amplifier (TIA) using a dual replica via monitoring an output of a first TIA (transimpedance amplifier) and a second TIA; configuring a first gain level of the first TIA based on a feedback resistance and a reference current applied at an input to the first TIA; configuring a second gain level of the second TIA and a third TIA based on a control voltage; and amplifying a received electrical current to generate an output voltage using the third TIA according to the second gain level. In some embodiments, one or both of the second TIA and the third TIA include a configurable feedback impedance used in compensating for changes in the second gain level due to a temperature of the respective second or third TIA via the configurable feedback impedance of the respective second or third TIA.

Nanoparticle control and detection system and operating method thereof

The present invention discloses a nanoparticle control and detection system and operating method thereof. The present invention controls and detects the nanoparticles in the same device. The device comprises a first transparent electrode, a photoconductive layer, a spacer which is deposed on the edge of the photoconductive layer and a second transparent electrode. The aforementioned device controls and detects the nanoparticles by applying AC/DC bias and AC/DC light source to the transparent electrode.

OPTICAL SENSING APPARATUS
20220359770 · 2022-11-10 ·

An optical sensing apparatus is provided. The optical sensing apparatus including: a substrate including a first material; an absorption region including a second material different from the first material, the absorption region configured to receive an optical signal and generate photo-carriers in response to receiving the optical signal; an amplification region formed in the substrate configured to collect at least a portion of the photo-carriers from the absorption region and to amplify the portion of the photo-carriers carriers; a buried-dopant region formed in the substrate and separated from the absorption region, wherein the buried-dopant region is configured to collect at least a portion of the amplified portion of the photo-carriers from the amplification region; and a buffer layer formed between the buried-dopant region and the absorption region, wherein the buffer layer is intrinsic and has a thickness not less than 150 nm.

LIGHT SENSING UNIT OF LIGHT SENSING DEVICE

The present invention discloses a light sensing unit of a light sensing device including a light sensing element and a switching element. The light sensing element includes a gate, a semiconductor layer, a gate insulating layer, a source, and a drain. The gate and the semiconductor layer are disposed on a substrate, the gate insulating layer separates the gate from the semiconductor layer, and the source and the drain are connected to the semiconductor layer respectively. At least one of the source and the drain are formed of a light-transmissive conductive layer. The semiconductor layer is disposed between one of the source and the drain and the gate, and when viewed along a normal direction of the substrate, the gate overlaps the one of the source and the drain, and the gate does not overlap another one of the source and the drain.