In order to enable simple removal of a substrate used for manufacturing a semiconductor element, a manufacturing method includes forming a graphene layer on a substrate portion formed of a semiconductor, forming an element portion on the graphene layer, the element portion including a semiconductor layer directly formed on the graphene layer, which takes over crystal information relating to the substrate portion when the semiconductor layer is formed on the substrate portion without intermediation of the graphene layer, and performing cutting-off between the substrate portion and the element portion at the graphene layer.

A photodetection element that includes: a substrate with a high infrared transmittance in a desired wavelength region; an electron barrier layer of a type-I superlattice structure, the electron barrier layer being formed above the substrate and lattice-matched to the substrate; and a light-receiving layer of a type-II superlattice structure, formed in contact with the electron barrier layer.

An avalanche diode including a gain region and a readout structure including an n-type (p-type) region having electrically isolated segments each including implanted regions; a p-type (n-type) region; and a first electrode on each of the segments. The gain region includes a p-n junction buried between the n-type region and the p-type region: an n.sup.+-type region having a higher n-type dopant density than the n-type region; a p.sup.+-type region having a higher p-type dopant density than the p-type region; and the p-n junction between the n.sup.+-type region and the p.sup.+-type region. A bias between the first electrodes and a second electrode (ohmically contacting the p-type (n-type) region) reverse biases the p-n junction. Electrons generated in response to electromagnetic radiation or charged particles generate additional electrons m the gain region through impact ionization but the segmented region comprises a low field region isolating the gain region from the first electrodes.

An image sensor device includes a semiconductor substrate, a radiation sensing member, a device layer, and a color filter layer. The semiconductor substrate has a photosensitive region and an isolation region surrounding the photosensitive region. The radiation sensing member is embedded in the photosensitive region of the semiconductor substrate. The radiation sensing member has a material different from a material of the semiconductor substrate, and an interface between the radiation sensing member and the isolation region of the semiconductor substrate includes a direct band gap material. The device layer is under the semiconductor substrate and the radiation sensing member. The color filter layer is over the radiation sensing member and the semiconductor substrate.

The invention provides an optoelectronic device comprising a photoactive region, which photoactive region comprises: an n-type region comprising at least one n-type layer; a p-type region comprising at least one p-type layer; and, disposed between the n-type region and the p-type region: a layer of a perovskite semiconductor without open porosity. The perovskite semiconductor is generally light-absorbing. In some embodiments, disposed between the n-type region and the p-type region is: (i) a first layer which comprises a scaffold material, which is typically porous, and a perovskite semiconductor, which is typically disposed in pores of the scaffold material; and (ii) a capping layer disposed on said first layer, which capping layer is said layer of a perovskite semiconductor without open porosity, wherein the perovskite semiconductor in the capping layer is in contact with the perovskite semiconductor in the first layer. The layer of the perovskite semiconductor without open porosity (which may be said capping layer) typically forms a planar heterojunction with the n-type region or the p-type region. The invention also provides processes for producing such optoelectronic devices which typically involve solution deposition or vapour deposition of the perovskite. In one embodiment, the process is a low temperature process; for instance, the entire process may be performed at a temperature or temperatures not exceeding 150° C.

Provided is a photodetector which can be manufactured in a standard process of a mass-produced CMOS foundry. The photodetector includes a silicon (Si) substrate; a lower clad layer; a core layer including a waveguide layer configured to guide signal light, and including a first Si slab doped with first conductive impurity ions and a second Si slab doped with second conductive impurity ions; a germanium (Ge) layer configured to absorb light and including a Ge region doped with the first conductive impurity ions; an upper clad layer; and electrodes respectively connected to the first and second Si slabs and the Ge region. A region of the core layer sandwiched between the first Si slab and the second Si slab operates as an amplification layer.

A PERC solar cell selective emitter includes a silicon wafer, first and second doped regions and a laser doped region with doped layers. First doped regions are located between the doped regions of each doped layer, and each second doped region is located between two adjacent doped layers. The PERC solar cell includes the selective emitter, a front anti-reflective layer on the surface of a front passivation layer, and a positive electrode. The positive electrode includes first silver paste layers on the surfaces of the laser doped regions and second silver paste layers on the surface of the front anti-reflective layer corresponding to the first doped regions. The second silver paste layers are in electrical contact with the first silver paste layers. Damage of laser to silicon wafers is reduced, compounding in silver paste areas is reduced, an open circuit voltage is increased, and battery efficiency is improved.

The invention provides an optoelectronic device comprising a photoactive region, which photoactive region comprises: an n-type region comprising at least one n-type layer; a p- type region comprising at least one p-type layer; and, disposed between the n-type region and the p-type region: a layer of a perovskite semiconductor without open porosity. The perovskite semiconductor is generally light-absorbing. In some embodiments, disposed between the n-type region and the p-type region is: (i) a first layer which comprises a scaffold material, which is typically porous, and a perovskite semiconductor, which is typically disposed in pores of the scaffold material; and (ii) a capping layer dis -posed on said first layer, which capping layer is said layer of a perovskite semiconductor without open porosity, wherein the perovskite semiconductor in the capping layer is in contact with the perovskite semiconductor in the first layer. The layer of the perovskite semiconductor without open porosity (which may be said capping layer) typically forms a planar heterojunction with the n-type region or the p-type region. The invention also provides processes for producing such optoelectronic devices which typically involve solution deposition or vapour deposition of the perovskite. In one embodiment, the process is a low temperature process; for instance, the entire process may be performed at a temperature or temperatures not exceeding 150° C.

Embodiments related to controlling of photo-generated charge carriers are described and depicted. At least one embodiment provides a semiconductor substrate comprising a photo-conversion region to convert light into photo-generated charge carriers; a region to accumulate the photo-generated charge carriers; a control electrode structure including a plurality of control electrodes to generate a potential distribution such that the photo-generated carriers are guided towards the region to accumulate the photo-generated charge carriers based on signals applied to the control electrode structure; a non-uniform doping profile in the semiconductor substrate to generate an electric field with vertical field vector components in at least a part of the photo-conversion region

An electromagnetic wave detector includes a light-receiving element, an insulating film, a two-dimensional material layer, a first electrode part, and a second electrode part. The light-receiving element includes a first semiconductor portion of a first conductivity type and a second semiconductor portion. The second semiconductor portion is joined to the first semiconductor portion. The second semiconductor portion is of a second conductivity type. The insulating film is disposed on the light-receiving element. The insulating film has an opening portion. The two-dimensional material layer is electrically connected to the first semiconductor portion in the opening portion. The two-dimensional material layer extends from on the opening portion onto the insulating film. The first electrode part is disposed on the insulating film. The first electrode part is electrically connected to the two-dimensional material layer. The second electrode part is electrically connected to the second semiconductor portion.