Methods of fabricating solar cell emitter regions with differentiated P-type and N-type architectures and incorporating dotted diffusion, and resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed in a plurality of non-continuous trenches in the back surface of the substrate.

Provided are a solar cell, a manufacturing method thereof and a photovoltaic module. The solar cell includes a semiconductor substrate, the semiconductor substrate having a first surface and a second surface opposite to each other; a first passivation layer and a first electrode layer that are located on the first surface of the semiconductor substrate; and a second passivation layer and a second electrode layer that are located on the second surface of the semiconductor substrate. A donor material film layer is provided between the first passivation layer and the first surface of the semiconductor substrate, and/or an acceptor material film layer is provided between the second passivation layer and the second surface of the semiconductor substrate.

Disclosed herein is a method for making a radiation detector. The method comprises forming a recess into a substrate and forming a semiconductor single crystal in the recess. The semiconductor single crystal may be a cadmium zinc telluride (CdZnTe) single crystal or a cadmium telluride (CdTe) single crystal. The method further comprises forming electrical contacts on the semi conductor single crystal and bonding the substrate to another substrate comprising an electronic system therein or thereon. The electronic system is connected to the electrical contact of the semiconductor single crystal and configured to process an electrical signal generated by the semiconductor single crystal upon absorption of radiation particles.

A photovoltaic device (100) can include an absorber layer (160). The absorber layer (160) can be doped p-type with a Group V dopant and can have a carrier concentration of the Group V dopant greater than 4×10.sup.15 cm.sup.−3. The absorber layer (160) can include oxygen in a central region of the absorber layer (160). The absorber layer (160) can include an alkali metal in the central region of the absorber layer (160). Methods for carrier activation can include exposing an absorber layer (160) to an annealing compound in a reducing environment (220). The annealing compound (224) can include cadmium chloride and an alkali metal chloride.

According to the embodiments provided herein, a photovoltaic device can include an absorber layer. The absorber layer can be doped p-type with a Group V dopant and can have a carrier concentration of the Group V dopant greater than 4×10.sup.15 cm.sup.−3. The absorber layer can include oxygen in a central region of the absorber layer. The absorber layer can include an alkali metal in the central region of the absorber layer. Methods for carrier activation can include exposing an absorber layer to an annealing compound in a reducing environment. The annealing compound can include cadmium chloride and an alkali metal chloride.

Methods of fabricating solar cell emitter regions with differentiated P-type and N-type architectures and incorporating dotted diffusion, and resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed in a plurality of non-continuous trenches in the back surface of the substrate.

A method for preparing silicon substrate having average crystallite size greater than or equal to 20 μm, including at least the steps of: (i) providing polycrystalline silicon substrate of which average grain size is less than or equal to 10 μm; (ii) subjecting substrate to overall homogeneous plastic deformation, at temperature of at least 1000° C.; (iii) subjecting substrate to localized plastic deformation in plurality of areas of substrate, called external stress areas, spacing between two consecutive areas being at least 20 μm, local deformation of substrate being strictly greater than overall deformation carried out in step (ii); step (iii) being able to be carried out subsequent to or simultaneous to step (ii); and (iv) subjecting substrate obtained in step (iii) to recrystallization heat treatment in solid phase, at temperature strictly greater than temperature used in step (ii), in order to obtain desired substrate.

The present invention relates to a method for producing highly doped polycrystalline semiconductor layers on a semiconductor substrate, wherein a first Si precursor composition comprising at least one first dopant is applied to one or more regions of the surface of the semiconductor substrate; optionally a second Si precursor composition comprising at least one second dopant is applied to one or more other regions of the surface of the semiconductor substrate, where the first dopant is an n-type dopant and the second dopant is a p-type dopant or vice versa; and the coated regions of the surface of the semiconductor substrate are each converted, so as to form polycrystalline silicon from the Si precursor. The invention further relates to the semiconductor obtainable by the method and to the use thereof, especially in the production of solar cells.

In one aspect, a method of processing a semiconductor substrate is disclosed, which comprises incorporating at least one dopant in a semiconductor substrate so as to generate a doped polyphase surface layer on a light-trapping surface, and optically annealing the surface layer via exposure to a plurality of laser pulses having a pulsewidth in a range of about 1 nanosecond to about 50 nanoseconds so as to enhance crystallinity of said doped surface layer while maintaining high above-bandgap, and in many embodiments sub-bandgap optical absorptance.

The invention relates to a process for fabricating a solar cell. The process comprises depositing a layer of amorphous silicon on a substrate using physical vapour deposition, said substrate being a layer of a dielectric disposed on a silicon wafer. The amorphous silicon is then annealed so as to generate a layer of polycrystalline silicon on the substrate.