H01L33/0033

SOLID STATE TRANSDUCER DEVICES WITH SEPARATELY CONTROLLED REGIONS, AND ASSOCIATED SYSTEMS AND METHODS
20180006084 · 2018-01-04 ·

Solid state transducer devices with independently controlled regions, and associated systems and methods are disclosed. A solid state transducer device in accordance with a particular embodiment includes a transducer structure having a first semiconductor material, a second semiconductor material and an active region between the first and second semiconductor materials, the active region including a continuous portion having a first region and a second region. A first contact is electrically connected to the first semiconductor material to direct a first electrical input to the first region along a first path, and a second contact electrically spaced apart from the first contact and connected to the first semiconductor material to direct a second electrical input to the second region along a second path different than the first path. A third electrical contact is electrically connected to the second semiconductor material.

Package Device
20180005913 · 2018-01-04 · ·

Provided is a package device, relating to the technical field of lamp beads. The package device comprises an SMD holder, wherein the SMD holder is a hollow housing with one end opened; and the material of sidewalls of the SMD holder is transparent plastic. In the package device provided by the present invention, a transparent material is provided as the material of the sidewalls of the SMD holder, and light generated after a chip is powered on can be partially transmitted out through the sidewalls of the SMD holder, avoiding blocking of the light generated after the chip is powered on by the sidewalls of the SMD holder, thereby increasing transmittance of light from the chip.

Optoelectronic Semiconductor Component

In an embodiment, an optoelectronic semiconductor component includes a semiconductor layer sequence with a doped first layer, a doped second layer, an active zone configured to generate radiation by electroluminescence between the first layer and the second layer, and a side surface extending transversely to the active zone and delimiting the semiconductor layer sequence in a lateral direction, two electrodes for electrical contact between the first and second layers and a cover layer located on the side surface in a region of the first layer, wherein the cover layer is in direct contact with the first layer, wherein a material of the cover layer alone and its direct contact with the first layer are configured to cause a formation of a depletion zone in the first layer, wherein the depletion zone comprises a lower concentration of majority charge carriers compared to a rest of the first layer, wherein the cover layer comprises a metal or a metal compound, and wherein the cover layer forms a Schottky contact with the first layer.

LED DISPLAY ASSEMBLY, METHOD FOR PROCESSING THE LED DISPLAY ASSEMBLY, AND LED DISPLAY SCREEN

Provided is a light-emitting diode (LED) display assembly. The LED display assembly includes a plurality of chips, a first carrier and a second carrier. Two opposite side surfaces of the first carrier are respectively a first mounting surface and a second mounting surface. The first mounting surface is provided with first pads, and the first pads are connected to the chips. The second mounting surface is provided with first pins, and wires in the first carrier connect the first pads to the first pins. An area of each of the first pins is larger than an area of each of the first pads. The second carrier is provided with a third mounting surface, the third mounting surface is provided with second pads whose number is the same as a number of the first pins, and the second pads are welded to the first pins in one-to-one correspondence.

DIODE AND MANUFACTURING METHOD THEREOF
20230207737 · 2023-06-29 · ·

Disclosed are a diode and a manufacturing method thereof. The diode includes: a first substrate, the first substrate being an N-type doped substrate with a doping concentration equal to or greater than 1×10.sup.18 cm.sup.−3; a metal atomic layer located on a first surface of the first substrate; an epitaxial structure located on the metal atomic layer; a first electrode located on the epitaxial structure; and a second electrode located on a second surface, opposite to the first surface, of the first substrate. The diode significantly reduces forward conduction voltage drop.

Solid state transducer devices with separately controlled regions, and associated systems and methods
09847372 · 2017-12-19 · ·

Solid state transducer devices with independently controlled regions, and associated systems and methods are disclosed. A solid state transducer device in accordance with a particular embodiment includes a transducer structure having a first semiconductor material, a second semiconductor material and an active region between the first and second semiconductor materials, the active region including a continuous portion having a first region and a second region. A first contact is electrically connected to the first semiconductor material to direct a first electrical input to the first region along a first path, and a second contact electrically spaced apart from the first contact and connected to the first semiconductor material to direct a second electrical input to the second region along a second path different than the first path. A third electrical contact is electrically connected to the second semiconductor material.

LIGHT-EMITTING DIODE

A light-emitting diode having a stack-like structure, whereby the stack-like structure comprises a substrate layer and a mirror layer and an n-doped bottom cladding layer and an active layer, producing electromagnetic radiation, and a p-doped top cladding layer and an n-doped current spreading layer, and the aforementioned layers are arranged in the indicated sequence. The active layer comprises a quantum well structure. A tunnel diode is situated between the top cladding layer and the current spreading layer, whereby the current spreading layer is formed predominantly of an n-doped Ga-containing layer, having a Ga content >1%.

TRANSISTORS HAVING ON-CHIP INTEGRARED PHOTON SOURCE OR PHOTONIC-OHMIC DRAIN TO FACILIATE DE-TRAPPING ELECTRONS TRAPPED IN DEEP TRAPS OF TRANSISTORS
20170338810 · 2017-11-23 ·

Techniques are provided that pumping of deep traps in GaN electronic devices using photons from an on-chip photon source. In various embodiments, a method for optical pumping of deep traps in GaN HEMTs is provided using an on-chip integrated photon source that is configured to generate photons during operation of the HEMT. In an aspect, the on-chip photon source is a SoH-LED. In various additional embodiments, an integration scheme is provided that integrates the photon source into the drain electrode of a HEMT, thereby converting the conventional HEMT with an ohmic drain to a transistor with hybrid photonic-ohmic drain (POD), a POD transistor or PODFET for short.

Epitaxial wafer and switch element and light-emitting element using same

An epitaxial wafer comprises an epitaxial layer disposed on a substrate. The epitaxial layer comprises first to third semiconductor layers. The third semiconductor layer has a thickness that is thicker than that of the first semiconductor layer. A second doping density of the second semiconductor layer is between a first doping density of the first semiconductor layer and a third doping density of the third semiconductor layer.

SYSTEMS FOR DRIVING THE GENERATION OF PRODUCTS USING QUANTUM VACUUM FLUCTUATIONS

Described herein are systems incorporating a Casimir cavity, such as an optical Casimir cavity or a plasmon Casimir cavity. The Casimir cavity modifies the zero-point energy density therein as compared to outside of the Casimir cavity. The Casimir cavities are paired in the disclosed systems with product generating devices and the difference in zero-point energy densities is used to directly drive the generation of products, such as chemical reaction products or emitted light.