A red-light emitting diode (LED) comprises: an n-doped portion; a p-doped portion; and a light emitting region located between the n-doped portion and a p-doped portion. The light emitting region comprises: a light-emitting indium gallium nitride layer which emits light at a peak wavelength between 600 and 750 nm under electrical bias thereacross; a III-nitride layer located on the light-emitting indium gallium nitride layer; and a III-nitride barrier layer located on the III-nitride layer, and the light emitting diode comprises a porous region of III-nitride material. A red mini LED, a red micro-LED, an array of micro-LEDs, and a method of manufacturing a red LED are also provided.

A red-light emitting diode (LED) comprises: an n-doped portion; a p-doped portion; and a light emitting region located between the n-doped portion and a p-doped portion. The light emitting region comprises: a light-emitting indium gallium nitride layer which emits light at a peak wavelength between 600 and 750 nm under electrical bias thereacross; a III-nitride layer located on the light-emitting indium gallium nitride layer; and a III-nitride barrier layer located on the III-nitride layer, and the light emitting diode comprises a porous region of III-nitride material. A red mini LED, a red micro-LED, an array of micro-LEDs, and a method of manufacturing a red LED are also provided.

Disclosed is an epitaxial substrate with a 2D material interposer on a surface of a polycrystalline substrate. The ultra-thin 2D material interposer is grown by van der Waals epitaxy. The lattice constant of a surface layer of the ultra-thin 2D material interposer and the coefficient of thermal expansion of the substrate base are highly fit with those of AlGaN or GaN. The ultra-thin 2D material interposer is of a single-layer structure or a composite-layer structure. An AlGaN or GaN single crystalline epitaxial layer is grown on the ultra-thin 2D material interposer by virtue of the van der Waals epitaxy. Therefore, the large-size substrate may be manufactured with far lower costs than related single crystal wafers.

A method of manufacturing a micro-LED comprises the steps of forming an n-doped connecting layer of III-nitride material over a porous region of III-nitride material, and forming an electrically-insulating mask layer on the n-doped connecting layer. The method comprises the steps of removing a portion of the mask to expose an exposed region of the n-doped connecting layer, and forming an LED structure on the exposed region of the n-doped connecting layer. A method of manufacturing an array of micro-LEDs comprises the step of removing a portion of the mask to expose an array of exposed regions of the n-doped connecting layer, and forming an LED structure on each exposed region of the n-doped connecting layer. A micro-LED and array of micro-LEDs are also provided.

A method of manufacturing a micro-LED comprises the steps of forming an n-doped connecting layer of III-nitride material over a porous region of III-nitride material, and forming an electrically-insulating mask layer on the n-doped connecting layer. The method comprises the steps of removing a portion of the mask to expose an exposed region of the n-doped connecting layer, and forming an LED structure on the exposed region of the n-doped connecting layer. A method of manufacturing an array of micro-LEDs comprises the step of removing a portion of the mask to expose an array of exposed regions of the n-doped connecting layer, and forming an LED structure on each exposed region of the n-doped connecting layer. A micro-LED and array of micro-LEDs are also provided.

A semiconductor structure comprises a layer of a first III-nitride material having a first lattice dimension; a non-porous layer of a second III-nitride material having a second lattice dimension different from the first lattice dimension; and a porous region of III-nitride material disposed between the layer of first III-nitride material and the non-porous layer of the second III-nitride material. An optoelectronic semiconductor device, an LED, and a method of manufacturing a semiconductor structure are also provided.

A semiconductor structure comprises a layer of a first III-nitride material having a first lattice dimension; a non-porous layer of a second III-nitride material having a second lattice dimension different from the first lattice dimension; and a porous region of III-nitride material disposed between the layer of first III-nitride material and the non-porous layer of the second III-nitride material. An optoelectronic semiconductor device, an LED, and a method of manufacturing a semiconductor structure are also provided.

A p-n junction based III-nitride device in which the p-type layers adjacent to the n-type layers are activated by thermal annealing with a porous n-type tunnel junction layer or layers. The porosity of the n-type tunnel junction layer(s) allows for gas exchange to occur, allowing efficient p-type nitride semiconductor activation. This porosification and activation step can be inserted wherever desired into an existing fabrication process for an LED, laser diode, or any other nitride semiconductor device. In one example, the device comprises multiple LED structures grown successively, separated by tunnel junctions and the buried p-type layers are activated by thermal annealing with adjacent porous n-type layers. Using this method, efficient monolithic multi-color LEDs can be formed.

A p-n junction based III-nitride device in which the p-type layers adjacent to the n-type layers are activated by thermal annealing with a porous n-type tunnel junction layer or layers. The porosity of the n-type tunnel junction layer(s) allows for gas exchange to occur, allowing efficient p-type nitride semiconductor activation. This porosification and activation step can be inserted wherever desired into an existing fabrication process for an LED, laser diode, or any other nitride semiconductor device. In one example, the device comprises multiple LED structures grown successively, separated by tunnel junctions and the buried p-type layers are activated by thermal annealing with adjacent porous n-type layers. Using this method, efficient monolithic multi-color LEDs can be formed.

A display device includes pixel electrodes disposed on a substrate, at least one light-emitting element disposed on each of the pixel electrodes, a planarization layer disposed on the pixel electrodes and filling a space between the at least one light-emitting element, and a common electrode disposed on the planarization layer and the at least one light-emitting element. Each of the light-emitting elements is arranged perpendicular to a top face of each of the pixel electrodes, at least one of the pixel electrodes includes a protrusion protruding toward an adjacent one of the pixel electrodes, and the protrusion overlaps the light-emitting element in a plan view.