Patent classifications
H01S5/0237
Semiconductor device and method of manufacturing the semiconductor device
A semiconductor device includes: a package including: a lower surface, at least one first metal surface at an outer periphery of the lower surface, and at least one second metal surface at the lower surface at a location different from the at least one first metal surface; a mounting substrate disposed below the package and including: an upper surface, at least one first metal pattern disposed at the upper surface below the at least one first metal surface, and at least one second metal pattern disposed at the upper surface below the at least one second metal surface; a first bonding member containing a metal material and bonding the at least one first metal surface and the at least one first metal pattern; and a second bonding member containing a metal material and bonding the at least one second metal surface and the at least one second metal pattern.
Semiconductor device and method of manufacturing the semiconductor device
A semiconductor device includes: a package including: a lower surface, at least one first metal surface at an outer periphery of the lower surface, and at least one second metal surface at the lower surface at a location different from the at least one first metal surface; a mounting substrate disposed below the package and including: an upper surface, at least one first metal pattern disposed at the upper surface below the at least one first metal surface, and at least one second metal pattern disposed at the upper surface below the at least one second metal surface; a first bonding member containing a metal material and bonding the at least one first metal surface and the at least one first metal pattern; and a second bonding member containing a metal material and bonding the at least one second metal surface and the at least one second metal pattern.
OPTICAL SEMICONDUCTOR ELEMENT
This optical semiconductor element includes: a substrate; a first ridge formed on the substrate and having a first first-conductivity-type cladding layer, a first core layer, a first second-conductivity-type cladding layer, and a first contact layer in this order from a lower side, with first ridge grooves provided on both lateral sides of the first ridge; and a first electrode formed in contact with the first contact layer, on the first ridge, without spreading to the first ridge grooves, the first electrode including a first solder layer.
High power, narrow linewidth semiconductor laser system and method of fabrication
A laser system for generating a narrow linewidth semiconductor light beam includes a substrate, a gain chip affixed on the substrate and configured to amplify light beam, and an optical feedback photonic chip affixed on the substrate, optically coupled to the gain chip, and configured to output light beam, which has a narrow linewidth around a resonant frequency of the optical feedback photonic chip, to the gain chip. The optical feedback photonic chip includes first and second optical gratings, a first multimode interferometer (MMI) and a second MMI optically coupled with a respective end of the first and second optical gratings, a third MMI configured to output two light beams to the first and second MMIs, respectively, through a respective waveguide. Based on receiving a respective one of the two light beams, the first MMI outputs two light beams to its respective end of the first and second optical gratings and the second MMI outputs two light beams to its respective end of the first and second optical gratings, the first and second optical gratings output second and third light beams, the second light beam, of which a linewidth is narrower than a linewidth of the third light beam, is directed to the third MMI, and an output port of the third MMI is configured to direct the second light beam to the gain chip.
High power, narrow linewidth semiconductor laser system and method of fabrication
A laser system for generating a narrow linewidth semiconductor light beam includes a substrate, a gain chip affixed on the substrate and configured to amplify light beam, and an optical feedback photonic chip affixed on the substrate, optically coupled to the gain chip, and configured to output light beam, which has a narrow linewidth around a resonant frequency of the optical feedback photonic chip, to the gain chip. The optical feedback photonic chip includes first and second optical gratings, a first multimode interferometer (MMI) and a second MMI optically coupled with a respective end of the first and second optical gratings, a third MMI configured to output two light beams to the first and second MMIs, respectively, through a respective waveguide. Based on receiving a respective one of the two light beams, the first MMI outputs two light beams to its respective end of the first and second optical gratings and the second MMI outputs two light beams to its respective end of the first and second optical gratings, the first and second optical gratings output second and third light beams, the second light beam, of which a linewidth is narrower than a linewidth of the third light beam, is directed to the third MMI, and an output port of the third MMI is configured to direct the second light beam to the gain chip.
WIRING BASE, PACKAGE FOR STORING SEMICONDUCTOR ELEMENT, AND SEMICONDUCTOR DEVICE
A wiring base includes a base having a first surface, at least one metal layer positioned on the first surface, at least one lead terminal positioned on the metal layer, and a joining member that is positioned on the metal layer and joins the lead terminal to the metal layer. The lead terminal has a first portion to be in contact with the joining member and also has a second portion being continuous with the first portion. In a cross section of the lead terminal orthogonal to a longitudinal direction of the lead terminal, the first portion has two concave surfaces that are formed near the metal layer so as to be disposed opposite to each other across a center in a transverse direction of the lead terminal.
WIRING BASE, PACKAGE FOR STORING SEMICONDUCTOR ELEMENT, AND SEMICONDUCTOR DEVICE
A wiring base includes a base having a first surface, at least one metal layer positioned on the first surface, at least one lead terminal positioned on the metal layer, and a joining member that is positioned on the metal layer and joins the lead terminal to the metal layer. The lead terminal has a first portion to be in contact with the joining member and also has a second portion being continuous with the first portion. In a cross section of the lead terminal orthogonal to a longitudinal direction of the lead terminal, the first portion has two concave surfaces that are formed near the metal layer so as to be disposed opposite to each other across a center in a transverse direction of the lead terminal.
Cooling device for cooling an electrical component and method for producing a cooling device
A cooling device (1) for cooling an electrical component (4), in particular a laser diode, including a base body (2) with at least one outer face (20) and at least one integrated cooling channel (5), in particular a micro-cooling channel, a connecting surface (21) on the outer face (20) of the base body (2) for connecting the electrical component (4) to the base body (2) and a first stabilising layer (11),
wherein the first stabilising layer (11) and the connecting surface (21) are arranged at least partially one above the other along a primary direction (P), and
wherein the first stabilising layer (11) is offset relative to the outer face (20) towards the interior of the base body (2) by a distance (A) along a direction parallel to the primary direction (P).
Cooling device for cooling an electrical component and method for producing a cooling device
A cooling device (1) for cooling an electrical component (4), in particular a laser diode, including a base body (2) with at least one outer face (20) and at least one integrated cooling channel (5), in particular a micro-cooling channel, a connecting surface (21) on the outer face (20) of the base body (2) for connecting the electrical component (4) to the base body (2) and a first stabilising layer (11),
wherein the first stabilising layer (11) and the connecting surface (21) are arranged at least partially one above the other along a primary direction (P), and
wherein the first stabilising layer (11) is offset relative to the outer face (20) towards the interior of the base body (2) by a distance (A) along a direction parallel to the primary direction (P).
Method of manufacturing light-emitting module, light-emitting module, and device
To provide a method of manufacturing a light-emitting module capable of accurately arranging a plurality of light-emitting elements at narrow intervals, and a light-emitting module manufactured by the method of manufacturing, and, moreover, a device on which the light-emitting module is mounted. Provided is a method of manufacturing a light-emitting module including: a plurality of light-emitting element arrays each including, in a plane parallel to resonator length of a light-emitting element, a plurality of the light-emitting elements arranged along a width direction perpendicular to a direction of the resonator length; and a substrate on which the plurality of light-emitting element arrays is mounted, the method including arranging the plurality of light-emitting elements on the substrate at predetermined intervals along the width direction in the light-emitting module, by causing side surfaces of the respective light-emitting element arrays adjacent to each other along the width direction to be in contact with each other and mounting the respective light-emitting element arrays on the substrate.