Patent classifications
H01S5/347
DEVICES WITH QUANTUM DOTS
An example method of manufacturing a semiconductor device. A first wafer may be provided that includes a first layer that contains quantum dots. A second wafer may be provided that includes a buried dielectric layer and a second layer on the buried dielectric layer. An interface layer may be formed on at least one of the first layer and the second layer, where the interface layer may be an insulator, a transparent electrical conductor, or a polymer. The first wafer may be bonded to the second wafer by way of the interface layer.
DEVICES WITH QUANTUM DOTS
An example method of manufacturing a semiconductor device. A first wafer may be provided that includes a first layer that contains quantum dots. A second wafer may be provided that includes a buried dielectric layer and a second layer on the buried dielectric layer. An interface layer may be formed on at least one of the first layer and the second layer, where the interface layer may be an insulator, a transparent electrical conductor, or a polymer. The first wafer may be bonded to the second wafer by way of the interface layer.
METHODS FOR OBTAINING AN N-TYPE DOPED METAL CHALCOGENIDE QUANTUM DOT SOLID-STATE ELEMENT WITH OPTICAL GAIN AND A LIGHT EMITTER INCLUDING THE ELEMENT, AND THE OBTAINED ELEMENT AND LIGHT EMITTER
The present invention relates to a method for obtaining an n-type doped metal chalcogenide quantum dot solid-state element with optical gain for low-threshold, band-edge amplified spontaneous emission (ASE), comprising: —forming a metal chalcogenide quantum dot solid-state element, and —carrying out an n-doping process on its metal chalcogenide quantum dots to at least partially bleach its band-edge absorption, which comprises: —a partial substitution of chalcogen atoms by halogen atoms, in the metal chalcogenide quantum dots, and/or —a partial aliovalent-cation substitution of bivalent metal cations by trivalent cations, in the metal chalcogenide quantum dots; and —providing a substance on the metal chalcogenide quantum dots, to avoid oxygen p-doping. The present invention also relates to the obtained n-type doped metal chalcogenide quantum dot solid-state element, a method for obtaining a light emitter with that n-type doped metal chalcogenide quantum dot solid-state element, and the obtained light emitter.
METHODS FOR OBTAINING AN N-TYPE DOPED METAL CHALCOGENIDE QUANTUM DOT SOLID-STATE ELEMENT WITH OPTICAL GAIN AND A LIGHT EMITTER INCLUDING THE ELEMENT, AND THE OBTAINED ELEMENT AND LIGHT EMITTER
The present invention relates to a method for obtaining an n-type doped metal chalcogenide quantum dot solid-state element with optical gain for low-threshold, band-edge amplified spontaneous emission (ASE), comprising: —forming a metal chalcogenide quantum dot solid-state element, and —carrying out an n-doping process on its metal chalcogenide quantum dots to at least partially bleach its band-edge absorption, which comprises: —a partial substitution of chalcogen atoms by halogen atoms, in the metal chalcogenide quantum dots, and/or —a partial aliovalent-cation substitution of bivalent metal cations by trivalent cations, in the metal chalcogenide quantum dots; and —providing a substance on the metal chalcogenide quantum dots, to avoid oxygen p-doping. The present invention also relates to the obtained n-type doped metal chalcogenide quantum dot solid-state element, a method for obtaining a light emitter with that n-type doped metal chalcogenide quantum dot solid-state element, and the obtained light emitter.
Optically cooled platform for thermal management applications
A semiconductor device comprising a waveguide having a core, said core having inserted therein one or more layers of nanoemitters.
Optically cooled platform for thermal management applications
A semiconductor device comprising a waveguide having a core, said core having inserted therein one or more layers of nanoemitters.
INFRARED LIGHT EMITTERS BASED ON INTERBAND TUNNELING IN UNIPOLAR DOPED N-TYPE TUNNELING STRUCTURES
A unipolar-doped light emitting diode or laser diode is described. The diode includes a bottom region having an n-type layer, a top region having an n-type layer, and a middle region between the top and bottom regions having at least one material different from the top or bottom region forming two or more heterojunctions. The top and bottom regions create light emission by interband tunneling-induced photon emission. Systems including the unipolar-doped diode including LIDAR are also taught.
INFRARED LIGHT EMITTERS BASED ON INTERBAND TUNNELING IN UNIPOLAR DOPED N-TYPE TUNNELING STRUCTURES
A unipolar-doped light emitting diode or laser diode is described. The diode includes a bottom region having an n-type layer, a top region having an n-type layer, and a middle region between the top and bottom regions having at least one material different from the top or bottom region forming two or more heterojunctions. The top and bottom regions create light emission by interband tunneling-induced photon emission. Systems including the unipolar-doped diode including LIDAR are also taught.
Plasmonic quantum well laser
A plasmonic quantum well laser may be provided. The plasmonic quantum well laser includes a plasmonic waveguide and a p-n junction structure extends orthogonally to a direction of plasmon propagation along the plasmonic waveguide. Thereby, the p-n junction is positioned atop a dielectric material having a lower refractive index than material building the p-n junction, and the quantum well laser is electrically actuated. A method for building the plasmonic quantum well laser is also provided.
Addressable laser array device including vertical cavity surface emitting lasers adopting nanostructure reflector disposed at intersections of plural wiring patterns
Provided are an addressable laser array device and an electronic apparatus including the addressable laser array device. The addressable laser array device includes a plurality of VCSELs, each including a distributed Bragg reflector (DBR), a nanostructure reflector including a plurality of nanostructures having a sub-wavelength dimension, and a gain layer disposed between the DBR and the nanostructure reflector; a plurality of first wiring patterns extending in a first direction and being electrically connected to the plurality of VCSELs, respectively; and a plurality of second wiring patterns extending in a second direction intersecting the first direction and being electrically connected to the plurality of VCSELs, respectively, wherein the plurality of VCSELs are disposed at intersections of the plurality of first wiring patterns and the plurality of second wiring patterns, and the addressable VCSEL array device is configured to selectively drive at least some of the plurality of VCSELs.