A method is provided for limiting double-frequency internal power distortion in a power system. The method includes receiving an input voltage from a voltage source at a power converter from which an output power is provided to an electrical load, measuring the output power having a waveform with a steady-state component and a double-frequency transient component, executing computer-readable program code, via processing circuitry, to determine a compensating waveform equal in amplitude to the double-frequency transient component, and that is anti-phase to the double-frequency transient component, and causing the power converter to generate the compensating waveform such that the waveform and the compensating waveform superpose, and the double-frequency transient component of the waveform and the compensating waveform destructively interfere, leaving the steady-state component that is delivered to the electrical load.

A DC-link charging arrangement is described having a DC-link capacitor, rectifier means, and contactor means arranged between supply voltage ports and the rectifier means and having at least one contactor. Such a charging arrangement should enable charging of a DC-link capacitor in a simple way with low losses. To this end a charging capacitor is arranged bridging the at least one contactor.

A DC-DC converter control circuit includes an error amplifier, a voltage-to-current conversion circuit, an oscillator circuit, and a pulse frequency modulation (PFM) control circuit. The error amplifier is configured to generate a difference voltage as a difference of an output voltage of the DC-DC converter circuit and a reference voltage. The voltage-to-current conversion circuit configured to convert the difference voltage to a difference current. The oscillator circuit is configured to generate a clock signal at a predetermined frequency for pulse width modulation. The PFM control circuit is configured to disable the oscillator circuit, based on the difference current, for PFM operation.

A method for reducing current ripple at an output of a power supply includes sensing an alternating current (AC) input voltage waveform; determining a correction factor for a switching frequency of the power supply based on the sensed AC input voltage; and applying the correction factor to the switching frequency of the power supply to modify the power supply switching frequency. A modification of the switching frequency synchronizes the switching frequency of the power supply to the AC input voltage waveform.

Disclosed are a Power Factor Correction (PFC) control method, apparatus, and device, and a computer-readable storage medium. The method includes: acquiring an input voltage value, input current value, and output voltage value from a PFC circuit (S101); acquiring a current reference value for current loop control by using a Prony’s method according to the input voltage value, the output voltage value, and a preset voltage reference value (S102); and performing current loop control according to the current reference value and the input current value, and outputting a corresponding Pulse Width Modulation (PWM) signal, so as to control a switch tube in the PFC circuit to be correspondingly switched on or switched off (S103).

In a power conversion system, a power converter includes a power conversion circuit connected to a direct current (DC) source via a DC distribution line and converts and supplies received DC power to a load, and a power conversion control unit. A power stabilizing device is disposed between the DC distribution line and the power converter and stabilizes a DC voltage applied from the DC power source. A control power source of the power stabilizing device performs current control of the current transformer to suppress DC magnetization caused by a DC current component of the primary current while compensating for a varying component of the DC voltage. The control power source acquires current information or voltage information calculated from control information used by the power conversion control unit for control operations related to energization of the load and uses it as control information for the power stabilizing device.

A ramp generator for a constant on-time DC-DC converter, wherein the ramp generator is configured to reduce DC offset and smooth transitions between conduction modes. The ramp voltage generator includes a common voltage generator suitable for generating a common voltage; a first ramp voltage generation block suitable for generating a first ramp voltage responsive to a first switching signal and a control signal, wherein the first switching signal resets one or more valley points of the first ramp voltage to one or more valley points of the common voltage; and a second ramp voltage generation block suitable for generating a second ramp voltage responsive to a second switching signal, the first ramp voltage, and the control signal.

The present disclosure provides for a hybrid DC-DC, Hybrid Variable Switched Capacitor (HVSC) power converter. The converter may include one or more power switching networks supporting a plurality of power conversion modes and characterised in that: an input terminal connected to an input power source and an associated input capacitance, an output terminal connected to a load and an associated output capacitance to obtain a desired output voltage or output load current regulation; and at least six switches, one or more inductors and one or more flying capacitors. The converter addresses the problems faced by inductor-based and inductor-less DC-DC power converters while providing higher power conversion efficiencies alike the inductor-less switched capacitor converters and voltage/current regulation alike the inductor-based power converters in a single power conversion unit and enable a duty cycle-based output voltage/current regulation.

Described embodiments include a circuit for reducing output voltage noise in a voltage regulator includes an amplifier having first and second amplifier inputs, a compensation terminal and an amplifier output. The first amplifier input is coupled to a reference voltage terminal, and the compensation terminal coupled to an output terminal. A buffer amplifier has a buffer input and a buffer output, and the buffer input is coupled to the amplifier output. A first transistor is coupled between a supply voltage terminal and the output terminal, and has a first control terminal that is coupled to the buffer output. A boost current injection circuit has a boost input and a boost output, and the boost input is coupled to the supply voltage terminal. A second transistor is coupled between the boost output and the compensation terminal, and has a second control terminal.

A power electronics charge coupler (PECC) unit allows vehicle-to-vehicle (V2V) energy transfer by forming a bidirectional buck/boost converter for supplying rapid energy transfer with wide input-output battery voltage and battery voltage levels. The PECC unit embeds DC-DC converter modules into the charging handles of the PECC unit. Each of the charging handles includes a half-bridge of the DC-DC converter and parasitic inductance of a cable between charging handles is utilized as a portion of the filter inductor for the converter. The PECC unit handles are each configured to connect to an electric vehicle and are dynamically configurable in one of four modes of operation based on the battery voltage of the electric vehicles to which the PECC unit is connected and based on which of the electric vehicles is designated as the receiver vehicle and which is designated as the supplier vehicle.