Patent classifications
H03B5/368
WIRELINE TRANSCEIVER WITH INTERNAL AND EXTERNAL CLOCK GENERATION
An integrated circuit device, having functional circuitry driven by a clock signal, includes a first clock path for accepting an external clock signal where the first clock path includes first biasing circuitry configured to controllably pass the external clock signal, a second clock path for accepting an external frequency reference signal where the second clock path includes internal clock generation circuitry configured to generate an internal clock signal from the external frequency reference signal and second biasing circuitry configured to controllably pass the external frequency reference signal to the internal clock generation circuitry, and selector circuitry configured to select, based on user input, a clock output to drive the functional circuitry of the integrated circuit device. The clock output is selected from between (i) an output of the first clock path, and (ii) an output of the second clock path.
Circuit Apparatus and Oscillator
A circuit apparatus includes an oscillation circuit that generates an oscillation signal, a first buffer circuit that outputs a first clock signal based on the oscillation signal, a second buffer circuit that outputs a second clock signal based on the first clock signal, a first terminal electrically couplable to a first node via which the first buffer circuit outputs the first clock signal, and a second terminal electrically coupled to a second node via which the second buffer circuit outputs the second clock signal, and the rise period of the first clock signal is shorter than the rise period of the second clock signal.
CIRCUIT DEVICE AND OSCILLATOR
A circuit device includes a first terminal to be coupled to one end of a resonator, a second terminal to be coupled to another end of the resonator, an amplifying element configured to amplify a signal from the first terminal to output the signal amplified to the second terminal, a first resistor element disposed on a signal path between an input node and an output node of the amplifying element, a capacitance element disposed on a signal path between the first terminal and the input node, and a first switch element configured to switch electrical coupling between the input node and a ground.
Wireline transceiver with internal and external clock generation
An integrated circuit device, having functional circuitry driven by a clock signal, includes a first clock path for accepting an external clock signal where the first clock path includes first biasing circuitry configured to controllably pass the external clock signal, a second clock path for accepting an external frequency reference signal where the second clock path includes internal clock generation circuitry configured to generate an internal clock signal from the external frequency reference signal and second biasing circuitry configured to controllably pass the external frequency reference signal to the internal clock generation circuitry, and selector circuitry configured to select, based on user input, a clock output to drive the functional circuitry of the integrated circuit device. The clock output is selected from between (i) an output of the first clock path, and (ii) an output of the second clock path.
Circuit Device And Oscillator
A circuit device includes an oscillation circuit. The oscillation circuit includes a first variable capacitance circuit whose capacitance change characteristic with respect to a capacitance control voltage is a positive characteristic and a second variable capacitance circuit whose capacitance change characteristic with respect to the capacitance control voltage is a negative characteristic, and oscillates a resonator. The circuit device further includes a switch circuit. The switch circuit receives a first input voltage at a first input terminal thereof, receives a second input voltage at a second input terminal thereof, outputs a first output voltage selected from a plurality of voltages including the first input voltage and the second input voltage to a first output terminal thereof to which the first variable capacitance circuit is electrically coupled, and outputs a second output voltage selected from the plurality of voltages to a second output terminal thereof to which the second variable capacitance circuit is electrically coupled.
Oscillator
An oscillator includes: a resonator; an oscillation circuit configured to oscillate the resonator; a first temperature compensation circuit configured to perform a first temperature compensation processing of temperature-compensating for a frequency of a first clock signal generated by oscillation of the resonator by the oscillation circuit; and a second temperature compensation circuit configured to receive the first clock signal subjected to the first temperature compensation processing, and to output a second clock signal subjected to a second temperature compensation processing based on the first clock signal. The first temperature compensation circuit is configured to perform a first-order first temperature compensation processing as the first temperature compensation processing. The second temperature compensation circuit is configured to perform a high-order second temperature compensation processing as the second temperature compensation processing.
Circuit device and oscillator
A circuit device includes a first terminal to be coupled to one end of a resonator, a second terminal to be coupled to another end of the resonator, an amplifying element configured to amplify a signal from the first terminal to output the signal amplified to the second terminal, a first resistor element disposed on a signal path between an input node and an output node of the amplifying element, a capacitance element disposed on a signal path between the first terminal and the input node, and a first switch element configured to switch electrical coupling between the input node and a ground.
Vibrator device
A vibrator device includes a semiconductor substrate, a base, a vibrating element, and a lid. The semiconductor substrate has a first surface and a second surface which is in a front-back relationship with the first surface. The base includes an integrated circuit disposed on a first surface or a second surface. The vibrating element is electrically coupled to the integrated circuit and is disposed on the first surface side. The lid is joined to the base at a joining portion of the base to accommodate the vibrating element. The integrated circuit includes a passive element, and the passive element is disposed such that at least a part of the passive element overlaps with the joining portion in a plan view from a direction orthogonal to the first surface.
Vibration device
A vibration device includes a base including a semiconductor substrate and through electrodes that pass through the portion between first and second surfaces of the semiconductor substrate, and a vibrator fixed to the first surface via an electrically conductive joining member. The following components are placed at the second surface: an oscillation circuit that is electrically coupled to the vibrator via the through electrodes and generates an oscillation signal by causing the vibrator to oscillate, a temperature sensor circuit, a temperature compensation circuit that performs temperature compensation on the oscillation signal, and an output buffer circuit that outputs a clock signal based on the oscillation signal. Dsx1<Dbx1, a distance between the output buffer circuit and one of the through electrodes is Dbx1, a distance between the temperature sensor circuit and the other through electrode is Dsx1.
CIRCUIT DEVICE, OSCILLATOR, ELECTRONIC APPARATUS, AND VEHICLE
A circuit device includes a phase comparator that performs phase comparison between an input signal based on an oscillation signal and a reference signal, a processor that performs a digital signal process on phase comparison result data which is a result of the phase comparison so as to generate frequency control data, and an oscillation signal generation circuit that generates the oscillation signal having an oscillation frequency which is set on the basis of the frequency control data. The processor performs the digital signal process by using data used when a hold-over state is ended in a case where the hold-over state occurs due to the absence or the abnormality of the reference signal, and then the hold-over state is ended.