A frequency modulation demodulation device and a control method thereof are provided. The frequency modulation demodulation device includes an input terminal, a phase converter, a phase-locked loop circuit, and a frequency offset/shift detector. The phase converter receives an input signal to obtain a phase signal. The phase-locked loop circuit generates a phase adjustment signal according to the phase signal and adjusts the phase signal according to the phase adjustment signal to perform demodulation of the input signal. The phase-locked loop circuit performs signal alignment and signal compensation on the phase signal to generate a filtered phase signal. The phase adjustment signal provides a feedback of and adjusts the phase signal. The frequency offset/shift detector generates a frequency offset/shift determining signal according to the phase adjustment signal. The frequency offset/shift determining signal is related to a phase frequency offset/shift of the input signal.

A frequency modulation demodulation device and a control method thereof are provided. The frequency modulation demodulation device includes an input terminal, a phase converter, a phase-locked loop circuit, and a frequency offset/shift detector. The input terminal receives an input signal. The phase converter is coupled to the input terminal and receives the input signal to obtain a phase signal. The phase-locked loop circuit is coupled to the phase converter to generate a phase adjustment signal according to the phase signal, and the phase-locked loop circuit adjusts the phase signal according to the phase adjustment signal to perform demodulation of the input signal. The frequency offset/shift detector is coupled to the phase-locked loop circuit and generates a frequency offset/shift determining signal according to the phase adjustment signal obtained from the phase-locked loop circuit. The frequency offset/shift determining signal is related to a phase frequency offset/shift of the input signal.

There is provided a demodulator that makes it possible to reduce or avoid deterioration in demodulation performance due to nonlinearity of input amplitude-frequency characteristics of a variable capacitive element included in an analog control signal input section of a frequency variable oscillator, while suppressing an influence of noise. The demodulator includes: a low-resolution A/D converter that performs analog-digital conversion of a first phase difference signal, which represents a phase difference between a digitally modulated modulation signal and an oscillation signal, with a resolution lower than at least a resolution of a digital demodulation signal, which is a final output, to generate a second phase difference signal that is digital; a low-resolution D/A converter that performs digital-analog conversion of the second phase difference signal to generate a third phase difference signal that is analog; an analog subtractor that subtracts the third phase difference signal from the first phase difference signal to generate a first control signal; an ADPLL that generates a second control signal on the basis of a reference signal and the oscillation signal; and an FVO that generates the oscillation signal on the basis of the first control signal and the second control signal.

A receiver is provided having a two-point-modulated phase-locked loop for the rapid scanning of the signal strength of a plurality of frequency channels. The two-point modulation includes a modulation of a frequency gain by an oscillator in the phase-locked loop and a modulation of a frequency division by a divider in the phase-locked loop.

A receiver is provided having a two-point-modulated phase-locked loop for the rapid scanning of the signal strength of a plurality of frequency channels. The two-point modulation includes a modulation of a frequency gain by an oscillator in the phase-locked loop and a modulation of a frequency division by a divider in the phase-locked loop.

An apparatus include a baseband processor configured to receive digital samples of a first wireless local area network (WLAN) signal demodulated with a first phase locked loop (PLL). The baseband processor is configured to determine whether to switch from using the first PLL to demodulate the first WLAN signal to a second PLL to demodulate the first WLAN signal. The apparatus further includes a selection circuit coupled to the first PLL and the second PLL. The selection switch is configured to switch from the first PLL to the second PLL based on the determination. The baseband processor is configured to receive additional digital samples of the first WLAN signal demodulated with the second PLL.

Various embodiments relate to a PLL based FSK demodulator, the FSK demodulator comprising a PFD configured to receive an input signal, a fully differential auxiliary charge pump configured to receive and amplify the input signal from the PFD, a capacitor configured to filter the input signal from the auxiliary charge pump and a fully differential slicer configured to demodulate the input signal and output recovered data.

An apparatus include a baseband processor configured to receive digital samples of a first wireless local area network (WLAN) signal demodulated with a first phase locked loop (PLL). The baseband processor is configured to determine whether to switch from using the first PLL to demodulate the first WLAN signal to a second PLL to demodulate the first WLAN signal. The apparatus further includes a selection circuit coupled to the first PLL and the second PLL. The selection switch is configured to switch from the first PLL to the second PLL based on the determination. The baseband processor is configured to receive additional digital samples of the first WLAN signal demodulated with the second PLL.

There is provided a demodulator that makes it possible to reduce or avoid deterioration in demodulation performance due to nonlinearity of input amplitude-frequency characteristics of a variable capacitive element included in an analog control signal input section of a frequency variable oscillator, while suppressing an influence of noise. The demodulator includes: a low-resolution A/D converter that performs analog-digital conversion of a first phase difference signal to generate a second phase difference signal that is digital; a low-resolution D/A converter that performs digital-analog conversion of the second phase difference signal to generate a third phase difference signal; an analog subtractor that subtracts the third phase difference signal from the first phase difference signal to generate a first control signal; an ADPLL that generates a second control signal; and an FVO that generates the oscillation signal on the basis of the first control signal and the second control signal.

Various embodiments relate to a PLL based FSK demodulator, the FSK demodulator comprising a PFD configured to receive an input signal, a fully differential auxiliary charge pump configured to receive and amplify the input signal from the PFD, a capacitor configured to filter the input signal from the auxiliary charge pump and a fully differential slicer configured to demodulate the input signal and output recovered data.